Inventor · disambiguated record
Michael B. Healy
Also filed as: HEALY MICHAEL · HEALY MICHAEL B · HEALY MICHAEL BRETT
38 granted patents·1 pending application·115 citations·filing 2007–2023
96Inventor score
Top patents by PatentIndex Score
39 records- 0196US9471423B1Selective memory error reportingIBM·Filed 2015·Granted Oct 18, 2016·25 cites·2 claims
- 0293US9747148B2Error monitoring of a memory device containing embedded error correctionIBM·Filed 2017·Granted Aug 29, 2017·7 cites·9 claims
- 0391US10019312B2Error monitoring of a memory device containing embedded error correctionIBM·Filed 2017·Granted Jul 10, 2018·7 cites·11 claims
- 0489US9734885B1Thermal-aware memoryIBM·Filed 2016·Granted Aug 15, 2017·9 cites·20 claims
- 0588US9898218B2Memory system with switchable operating bandsIBM·Filed 2016·Granted Feb 20, 2018·5 cites·19 claims
- 0688US9761294B1Thermal-aware memoryIBM·Filed 2016·Granted Sep 12, 2017·9 cites·20 claims
- 0787US9606851B2Error monitoring of a memory device containing embedded error correctionIBM·Filed 2015·Granted Mar 28, 2017·4 cites·15 claims
- 0887US7441833B1Arrangement and method for converting of single panel sunroofs into double panel sunroofs and component parts thereofWEBASTO ROOF SYSTEMS INC·Filed 2007·Granted Oct 28, 2008·24 cites·19 claims
- 0986US9940457B2Detecting a cryogenic attack on a memory device with embedded error correctionIBM·Filed 2015·Granted Apr 10, 2018·5 cites·17 claims
- 1086US9626242B2Memory device error history bitIBM·Filed 2015·Granted Apr 18, 2017·4 cites·9 claims
- 1185US9690649B2Memory device error history bitIBM·Filed 2015·Granted Jun 27, 2017·4 cites·12 claims
- 1277US10740003B2Latency-agnostic memory controllerIBM·Filed 2018·Granted Aug 11, 2020·2 cites·17 claims
- 1374US9684555B2Selective memory error reportingIBM·Filed 2015·Granted Jun 20, 2017·3 cites·20 claims
- 1473US9383411B2Three-dimensional processing system having at least one layer with circuitry dedicated to scan testing and system state checkpointing of other system layersIBM·Filed 2013·Granted Jul 5, 2016·2 cites·14 claims
- 1569US9389876B2Three-dimensional processing system having independent calibration and statistical collection layerIBM·Filed 2014·Granted Jul 12, 2016·2 cites·20 claims
- 1669US8799710B23-D stacked multiprocessor structures and methods to enable reliable operation of processors at speeds above specified limitsBUYUKTOSUNOGLU ALPER·Filed 2012·Granted Aug 5, 2014·2 cites·9 claims
- 1760US10027349B2Extended error correction coding data storageIBM·Filed 2015·Granted Jul 17, 2018·1 cites·9 claims
- 1857US9696379B2Three-dimensional processing system having at least one layer with circuitry dedicated to scan testing and system state checkpointing of other system layersIBM·Filed 2016·Granted Jul 4, 2017·0 cites·10 claims
- 1957US8826073B23-D stacked multiprocessor structures and methods to enable reliable operation of processors at speeds above specified limitsBUYUKTOSUNOGLU ALPER·Filed 2012·Granted Sep 2, 2014·0 cites·8 claims
- 2056US10613774B2Partitioned memory with locally aggregated copy poolsIBM·Filed 2017·Granted Apr 7, 2020·0 cites·9 claims
- 2154US10606487B2Partitioned memory with locally aggregated copy poolsIBM·Filed 2017·Granted Mar 31, 2020·0 cites·11 claims
- 2253US10831669B2Systems, methods and computer program products using multi-tag storage for efficient data compression in cachesIBM·Filed 2018·Granted Nov 10, 2020·0 cites·20 claims
- 2353US2025165221A1Quantum control system architecture for real-time pauli twirling of quantum programsIBM·Filed 2023·Application pending·0 cites
- 2452US10063263B2Extended error correction coding data storageIBM·Filed 2015·Granted Aug 28, 2018·0 cites·9 claims
- 2550US9442884B23-D stacked multiprocessor structures and methods for multimodal operation of sameBUYUKTOSUNOGLU ALPER·Filed 2012·Granted Sep 13, 2016·0 cites·5 claims
- 2650US9336144B2Three-dimensional processing system having multiple caches that can be partitioned, conjoined, and managed according to more than one set of rules and/or configurationsGLOBALFOUNDRIES INC·Filed 2013·Granted May 10, 2016·0 cites·20 claims
- 2749US9471535B23-D stacked multiprocessor structures and methods for multimodal operation of sameBUYUKTOSUNOGLU ALPER·Filed 2012·Granted Oct 18, 2016·0 cites·6 claims
- 2849US9190118B2Memory architectures having wiring structures that enable different access patterns in multiple dimensionsIBM·Filed 2013·Granted Nov 17, 2015·0 cites·19 claims
- 2948US9569402B23-D stacked multiprocessor structure with vertically aligned identical layout operating processors in independent mode or in sharing mode running faster componentsBUYUKTOSUNOGLU ALPER·Filed 2012·Granted Feb 14, 2017·0 cites·16 claims
- 3048US9298672B23-D stacked multiprocessor structure with vertically aligned identical layout operating processors in independent mode or in sharing mode running faster componentsBUYUKTOSUNOGLU ALPER·Filed 2012·Granted Mar 29, 2016·0 cites·11 claims
- 3148US9195630B2Three-dimensional computer processor systems having multiple local power and cooling layers and a global interconnection structureIBM·Filed 2013·Granted Nov 24, 2015·0 cites·20 claims
- 3247US11481158B2Enabling compression based on queue occupancyIBM·Filed 2018·Granted Oct 25, 2022·0 cites·9 claims
- 3347US9733870B2Error vector readout from a memory deviceIBM·Filed 2015·Granted Aug 15, 2017·0 cites·14 claims
- 3446US11210092B2Servicing indirect data storage requests with multiple memory controllersIBM·Filed 2018·Granted Dec 28, 2021·0 cites·16 claims
- 3546US9734008B2Error vector readout from a memory deviceIBM·Filed 2015·Granted Aug 15, 2017·0 cites·6 claims
- 3644US10776155B2Aggregating, disaggregating and converting electronic transaction request messagesIBM·Filed 2018·Granted Sep 15, 2020·0 cites·18 claims
- 3744US10067702B2Memory system with switchable operating bandsIBM·Filed 2017·Granted Sep 4, 2018·0 cites·1 claims
- 3843US9257152B2Memory architectures having wiring structures that enable different access patterns in multiple dimensionsGLOBALFOUNDRIES INC·Filed 2012·Granted Feb 9, 2016·0 cites·28 claims
- 3939US10283212B2Built-in self-test for embedded spin-transfer torque magnetic random access memoryIBM·Filed 2016·Granted May 7, 2019·0 cites·17 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →