Inventor · disambiguated record
Chien-Sheng Su
Also filed as: SU CHIEN-SHENG
39 granted patents·8 pending applications·822 citations·filing 1986–2023
98Inventor score
Files withSILICON STORAGE TECH INC37EON SILICON DEVICES INC3LIU XIAN3KOTOV ALEXANDER1SEEQ TECHNOLOGY INC1
Top patents by PatentIndex Score
47 records- 0199US9887206B2Method of making split gate non-volatile memory cell with 3D FinFET structureSILICON STORAGE TECH INC·Filed 2017·Granted Feb 6, 2018·56 cites·5 claims
- 0298US9276006B1Split gate non-volatile flash memory cell having metal-enhanced gates and method of making sameSILICON STORAGE TECH INC·Filed 2015·Granted Mar 1, 2016·48 cites·12 claims
- 0397US9972630B2Split gate non-volatile flash memory cell having metal gates and method of making sameSILICON STORAGE TECH INC·Filed 2016·Granted May 15, 2018·14 cites·10 claims
- 0497US7927994B1Split gate non-volatile flash memory cell having a floating gate, control gate, select gate and an erase gate with an overhang over the floating gate, array and method of manufacturingSILICON STORAGE TECH INC·Filed 2010·Granted Apr 19, 2011·73 cites·6 claims
- 0597US7868375B2Split gate non-volatile flash memory cell having a floating gate, control gate, select gate and an erase gate with an overhang over the floating gate, array and method of manufacturingSILICON STORAGE TECH INC·Filed 2009·Granted Jan 11, 2011·230 cites·2 claims
- 0696US9985042B2Method of integrating FinFET CMOS devices with embedded nonvolatile memory cellsSILICON STORAGE TECH INC·Filed 2017·Granted May 29, 2018·14 cites·13 claims
- 0796US9634018B2Split gate non-volatile memory cell with 3D finFET structure, and method of making sameSILICON STORAGE TECH INC·Filed 2016·Granted Apr 25, 2017·12 cites·10 claims
- 0896US9496369B2Method of forming split-gate memory cell array along with low and high voltage logic devicesSILICON STORAGE TECH INC·Filed 2016·Granted Nov 15, 2016·16 cites·6 claims
- 0996US9379121B1Split gate non-volatile flash memory cell having metal gates and method of making sameSILICON STORAGE TECH INC·Filed 2015·Granted Jun 28, 2016·16 cites·18 claims
- 1095US9634019B1Non-volatile split gate memory cells with integrated high K metal gate, and method of making sameSILICON STORAGE TECH INC·Filed 2016·Granted Apr 25, 2017·14 cites·8 claims
- 1193US10418451B1Split-gate flash memory cell with varying insulation gate oxides, and method of forming sameSILICON STORAGE TECH INC·Filed 2018·Granted Sep 17, 2019·9 cites·5 claims
- 1292US10249631B2Split gate non-volatile flash memory cell having metal gatesSILICON STORAGE TECH INC·Filed 2018·Granted Apr 2, 2019·7 cites·5 claims
- 1391US10714634B2Non-volatile split gate memory cells with integrated high K metal control gates and method of making sameSILICON STORAGE TECH INC·Filed 2018·Granted Jul 14, 2020·7 cites·21 claims
- 1491US9793281B2Non-volatile split gate memory cells with integrated high K metal gate logic device and metal-free erase gate, and method of making sameSILICON STORAGE TECH INC·Filed 2016·Granted Oct 17, 2017·7 cites·5 claims
- 1591US9721958B2Method of forming self-aligned split-gate memory cell array with metal gates and logic devicesSILICON STORAGE TECH INC·Filed 2016·Granted Aug 1, 2017·7 cites·13 claims
- 1691US8883592B2Non-volatile memory cell having a high K dielectric and metal gateKOTOV ALEXANDER·Filed 2012·Granted Nov 11, 2014·18 cites·18 claims
- 1791US4783766ABlock electrically erasable EEPROMSEEQ TECHNOLOGY INC·Filed 1986·Granted Nov 8, 1988·66 cites·7 claims
- 1889US10217850B2Method of forming pairs of three-gate non-volatile flash memory cells using two polysilicon deposition stepsSILICON STORAGE TECH INC·Filed 2017·Granted Feb 26, 2019·7 cites·6 claims
- 1988US9484261B2Formation of self-aligned source for split-gate non-volatile memory cellSILICON STORAGE TECH INC·Filed 2014·Granted Nov 1, 2016·10 cites·6 claims
- 2088US9431407B2Method of making embedded memory device with silicon-on-insulator substrateSILICON STORAGE TECH INC·Filed 2014·Granted Aug 30, 2016·10 cites·10 claims
- 2187US8785307B2Method of forming a memory cell by reducing diffusion of dopants under a gateLIU XIAN·Filed 2012·Granted Jul 22, 2014·9 cites·10 claims
- 2286US9123822B2Split gate non-volatile flash memory cell having a silicon-metal floating gate and method of making sameSILICON STORAGE TECH INC·Filed 2013·Granted Sep 1, 2015·10 cites·2 claims
- 2385US9634020B1Method of making embedded memory device with silicon-on-insulator substrateSILICON STORAGE TECH INC·Filed 2016·Granted Apr 25, 2017·4 cites·8 claims
- 2485US6706592B2Self aligned method of forming a semiconductor array of non-volatile memory cellsSILICON STORAGE TECH INC·Filed 2002·Granted Mar 16, 2004·38 cites·12 claims
- 2582US5966330AMethod and apparatus for measuring the threshold voltage of flash EEPROM memory cells being applied a variable control gate biasEON SILICON DEVICES INC·Filed 1998·Granted Oct 12, 1999·52 cites·18 claims
- 2679US9793280B2Integration of split gate flash memory array and logic devicesSILICON STORAGE TECH INC·Filed 2016·Granted Oct 17, 2017·5 cites·18 claims
- 2777US9972493B2Method of forming low height split gate memory cellsSILICON STORAGE TECH INC·Filed 2017·Granted May 15, 2018·2 cites·11 claims
- 2876US2023238453A1Method of forming pairs of three-gate non-volatile flash memory cells using two polysilicon deposition stepsSILICON STORAGE TECH INC·Filed 2023·Application pending·0 cites
- 2975US9659946B2Self-aligned source for split-gate non-volatile memory cellSILICON STORAGE TECH INC·Filed 2016·Granted May 23, 2017·2 cites·5 claims
- 3075US5790460AMethod of erasing a flash EEPROM memoryEON SILICON DEVICES INC·Filed 1997·Granted Aug 4, 1998·40 cites·14 claims
- 3173US10312246B2Split-gate flash memory cell with improved scaling using enhanced lateral control gate to floating gate couplingSILICON STORAGE TECH INC·Filed 2015·Granted Jun 4, 2019·2 cites·16 claims
- 3273US9673208B2Method of forming memory array and logic devicesSILICON STORAGE TECH INC·Filed 2016·Granted Jun 6, 2017·2 cites·20 claims
- 3372US9293358B2Double patterning method of forming semiconductor active areas and isolation regionsSILICON STORAGE TECH INC·Filed 2014·Granted Mar 22, 2016·2 cites·10 claims
- 3470US11652162B2Method of forming a three-gate non-volatile flash memory cell using two polysilicon deposition stepsSILICON STORAGE TECH INC·Filed 2020·Granted May 16, 2023·0 cites·6 claims
- 3565US9793279B2Split gate non-volatile memory cell having a floating gate, word line, erase gate, and method of manufacturingSILICON STORAGE TECH INC·Filed 2016·Granted Oct 17, 2017·2 cites·5 claims
- 3658US10141321B2Method of forming flash memory with separate wordline and erase gatesSILICON STORAGE TECH INC·Filed 2016·Granted Nov 27, 2018·1 cites·15 claims
- 3755US9330922B2Self-aligned stack gate structure for use in a non-volatile memory array and a method of forming such structureTOREN WILLEM-JAN·Filed 2012·Granted May 3, 2016·1 cites·10 claims
- 3852US10381359B2Non-volatile split game memory cells with integrated high K metal gate logic device and metal-free erase gate, and method of making sameSILICON STORAGE TECH INC·Filed 2017·Granted Aug 13, 2019·0 cites·4 claims
- 3949US2014084367A1Extended Source-Drain MOS Transistors And Method Of FormationSILICON STORAGE TECH INC·Filed 2013·Application pending·0 cites
- 4049US2009039410A1Split Gate Non-Volatile Flash Memory Cell Having A Floating Gate, Control Gate, Select Gate And An Erase Gate With An Overhang Over The Floating Gate, Array And Method Of ManufacturingLIU XIAN·Filed 2007·Application pending·0 cites
- 4147US2011127599A1Split Gate Non-volatile Flash Memory Cell Having A Floating Gate, Control Gate, Select Gate And An Erase Gate With An Overhang Over The Floating Gate, Array And Method Of ManufacturingLIU XIAN·Filed 2011·Application pending·0 cites
- 4244US9293359B2Non-volatile memory cells with enhanced channel region effective width, and method of making sameSILICON STORAGE TECH INC·Filed 2014·Granted Mar 22, 2016·0 cites·7 claims
- 4344US6023426AMethod of achieving narrow VT distribution after erase in flash EEPROMEON SILICON DEVICES INC·Filed 1998·Granted Feb 8, 2000·9 cites·10 claims
- 4444US2015270372A1Method Of Forming Extended Source-Drain MOS TransistorsSILICON STORAGE TECH INC·Filed 2015·Application pending·0 cites
- 4542US2015179749A1Non-volatile Memory Cell With Self Aligned Floating And Erase Gates, And Method Of Making SameSILICON STORAGE TECH INC·Filed 2013·Application pending·0 cites
- 4642US2015263040A1Embedded Memory Device With Silicon-On-Insulator Substrate, And Method Of Making SameSILICON STORAGE TECH INC·Filed 2014·Application pending·0 cites
- 4738US2014273387A1Method Of Making High-Voltage MOS Transistors With Thin Poly GateSU CHIEN-SHENG·Filed 2013·Application pending·0 cites
Join the waitlist — get patent alerts
Get an alert when Chien-Sheng Su files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →