Method of making flip chip

Abstract

Disclosed is a method for manufacturing a flip chip, in which a gold typically used in a flip chip manufacturing is adhered by conductive adhesives, wherein the method comprises steps of depositing a metal seed layer on a substrate; applying and patterning a photoresist or a dry film; forming a gold bump by electroplating; patterning the seed layer; forming an insulating layer on the seed layer and upper end of the gold bump; and patterning an insulating layer. Accordingly, it is possible to manufacture a flip chip, in which electrical function between bumps can be evaluated, with less cost.

The invention claimed is: 
     
       1. A flip chip comprising:
 an insulating layer arranged on and directly contacted with a substrate, wherein the insulating layer covers the substrate;   a metal patterned seed layer arranged on the insulating layer and directly contacted with the insulating layer; and   a plate bump layer formed on the metal patterned seed layer, wherein one or more plate bumps are formed;   wherein a metal pattern is formed at a side of the plate bump, and is formed by patterning the metal patterned seed layer; wherein the metal pattern is at least a part of the metal patterned seed layer, and forms electrical connection between the plate bumps.   
     
     
       2. The flip chip as claimed in  claim 1 , wherein the substrate is one selected from the group consisting of a silicon wafer, a compound semiconductor, quartz, glass, and ceramic material. 
     
     
       3. The flip chip as claimed in  claim 1 , wherein the insulating layer comprises SiO 2  or Si 3 N 4 . 
     
     
       4. The flip chip as claimed in  claim 1 , wherein the seed layer comprises an adhesive layer and an electrode layer. 
     
     
       5. The flip chip as claimed in  claim 4 , wherein the adhesive layer comprises titanium, and the electrode layer comprises copper or gold. 
     
     
       6. A flip chip manufacturing method comprising:
 (a) forming a seed layer on a substrate by using a conductive thin layer;   (b) applying and patterning a photoresist or a dry film;   (c) forming gold bumps by electroplating;   (d) patterning the seed layer to form a metal pattern;   (e) forming an insulating layer on the seed layer and the upper end of the gold bumps; and   (f) applying and patterning a photoresist or a dry film so as to pattern the insulating layer;   wherein the metal pattern forms electrical connection between the gold bumps, and the polarity of the photoresist or a dry film in step b) is opposite to the polarity of photoresist or a dry film in step f).   
     
     
       7. The flip chip manufacturing method as claimed in  claim 6 , wherein the patterning of steps (b) and (f) are performed by photolithography. 
     
     
       8. The flip chip manufacturing method as claimed in  claim 7 , wherein a photolithography mask used in the patterning processes of step (b) is the same as that of step (f). 
     
     
       9. The flip chip manufacturing method as claimed in  claim 6 , wherein the patterning process of step (d) comprises applying and patterning a photoresist or a dry film and etching a portion of the conductive thin film on which portion the photoresist or the dry film is not, so as to form a metal pattern for electrical connection between gold bumps. 
     
     
       10. A flip chip manufacturing method comprising:
 (a) forming a seed layer on a substrate by using a conductive thin layer;   (b) applying and patterning a photoresist or a dry film;   (c) forming gold bumps by electroplating;   (d) patterning the seed layer to form a metal pattern;   (e) forming an insulating layer on the seed layer and the upper end of the gold bumps; and   (f) applying and patterning a photoresist or a dry film so as to pattern the insulating layer,   wherein the metal pattern forms electrical connection between the gold bumps, and the polarity of the photo-resist or a dry film in the step (b) is opposite to the polarity of photoresist or a dry film in the step (f),   wherein the step (b) of applying and patterning comprises forming a photoresist layer over the seed layer and patterning the photoresist layer to form at least two openings to expose the seed layer through the photoresist layer,   wherein the step (c) of forming gold bumps comprises electroplating at least two gold bumps in the at least two openings in which the seed layer works as an electrode for electroplating so that an electrode wire does not have to be formed for each of the gold bumps.   
     
     
       11. The method of claim 10,
 wherein subsequent to electroplating, the photoresist layer over the seed layer is removed to provide an intermediate structure that comprises the substrate, the seed layer on the substrate, and the at least two gold bumps formed on the seed layer.   
     
     
       12. The method of claim 10,
 wherein patterning the seed layer in the step (d) maintains a first portion of the seed layer and removes a second portion of the seed layer which exposes a portion of the substrate, whereby the metal pattern formed in the step (d) comprises the first portion of the seed layer and does not comprise the second portion of the seed layer,   wherein the insulating layer formed in the step (e) is provided over the upper end of the at least two gold bumps and over the first portion of the seed layer,   wherein the step of (f) applying and patterning removes the insulation layer provided over the upper end of the at least two gold bumps while maintaining the insulation layer over the first portion of the seed layer,   wherein the method provides a flip chip device comprising the substrate, the metal pattern, the at least two gold bumps, and the insulating layer, wherein the metal pattern is formed on the substrate and comprises the first portion of the seed layer that interconnects the at least two gold bumps, wherein the insulating layer remains over the first portion of the seed layer.   
     
     
       13. The method of claim 10,
 wherein patterning the seed layer in the step (d) maintains a first portion of the seed layer and removes a second portion of the seed layer which exposes a portion of the substrate, whereby the metal pattern formed in the step (d) comprises the first portion of the seed layer and does not comprise the second portion of the seed layer,   wherein the insulating layer formed in the step (e) is provided over the upper end of the at least two gold bumps, over the first portion of the seed layer, and over the portion of the substrate exposed by removal of the second portion of the seed layer,   wherein the step of (f) applying and patterning removes the insulation layer provided over the upper end of the at least two gold bumps while maintaining the insulation layer over the first portion of the seed layer and also maintaining the insulation layer over the portion of the substrate exposed by removal of the second portion of the seed layer,   wherein the method provides a flip chip device comprising the substrate, the metal pattern, the at least two gold bumps, and the insulating layer, wherein the metal pattern is formed on the substrate and comprises the first portion of the seed layer that interconnects the at least two gold bumps, wherein the insulating layer remains over the first portion of the seed layer and over the portion of the substrate exposed by removal of the second portion of the seed layer.   
     
     
       14. The method of claim 10, wherein the substrate comprises an insulation layer on top such that the seed layer is formed on the insulation layer of the substrate.  
     
     
       15. The method of claim 10, wherein electroplating in the step (c) is to a level that does not exceed a height of the first photoresist layer. 
     
     
       16. The method of claim 10, wherein the gold bumps formed in the step (c) have a height in a range of about 10 nm to 19 μm. 
     
     
       17. The method of claim 10, wherein the seed layer comprises an adhesion layer and an electrode layer, wherein the adhesion layer has a thickness of about 10 nm to 100 nm, wherein the electrode layer has a thickness of about 100 nm to 1000 nm. 
     
     
       18. A flip chip manufacturing method comprising:
 (a) forming a seed layer on a substrate by using a conductive thin layer;   (b) applying and patterning a photoresist or a dry film;   (c) forming gold bumps by electroplating;   (d) patterning the seed layer to form a metal pattern;   (e) forming an insulating layer on the seed layer and the upper end of the gold bumps; and   (f) applying and patterning a photoresist or a dry film so as to pattern the insulating layer,   wherein the metal pattern forms electrical connection between the gold bumps, and the polarity of the photo-resist or a dry film in the step (b) is opposite to the polarity of photoresist or a dry film in the step (f),   wherein the step (c) of forming gold bumps comprises electroplating at least two gold bumps using the seed layer as an electrode so that no electrode wire is needed to form the at least two gold bumps.   
     
     
       19. The method of claim 18,
 wherein the step (d) of patterning the seed layer to form a metal pattern comprises:
 forming another photoresist layer that covers the at least two gold bumps, covers a first portion of the seed layer, and does not cover a second portion of the seed layer, 
 subsequently etching the second portion of the seed layer that is not covered by the other photoresist layer while maintaining the at least two gold bumps and also maintaining the first portion of the seed layer that are covered by the other photoresist layer, and 
 subsequently removing the other photoresist layer to provide the metal pattern that comprises the first portion of the seed layer and does not comprise the second portion of the seed layer. 
   
     
     
       20. The method of claim 18,
 wherein patterning the seed layer in the step (d) maintains a first portion of the seed layer and removes a second portion of the seed layer which exposes a portion of the substrate, whereby the metal pattern formed in the step (d) comprises the first portion of the seed layer and does not comprise the second portion of the seed layer,   wherein the insulating layer formed in the step (e) is provided over the upper end of the at least two gold bumps and over the first portion of the seed layer,   wherein the step of (f) applying and patterning removes the insulation layer provided over the upper end of the at least two gold bumps while maintaining the insulation layer over the first portion of the seed layer,   wherein the method provides a flip chip device comprising the substrate, the metal pattern, the at least two gold bumps, and the insulating layer, wherein the metal pattern is formed on the substrate and comprises the first portion of the seed layer that interconnects the at least two gold bumps, wherein the insulating layer remains over the first portion of the seed layer.   
     
     
       21. The method of claim 18,
 wherein patterning the seed layer in the step (d) maintains a first portion of the seed layer and removes a second portion of the seed layer which exposes a portion of the substrate, whereby the metal pattern formed in the step (d) comprises the first portion of the seed layer and does not comprise the second portion of the seed layer,   wherein the insulating layer formed in the step (e) is provided over the upper end of the at least two gold bumps and over the first portion of the seed layer,   wherein the step of (f) applying and patterning a photoresist or a dry film comprises:
 forming another photoresist layer over the insulating layer, 
 patterning the other photoresist layer such that the other photoresist layer stays over the insulating layer formed over the first portion of the seed layer while exposing the insulating layer formed over the upper end of the gold bumps, 
 subsequently etching the insulating layer formed over the upper end of the gold bumps to expose the upper end of the gold bump while maintaining the other photoresist layer staying over the insulating layer formed on the first portion of the seed layer, and 
 subsequently, removing the other photoresist layer to provide the flip chip device. 
   
     
     
       22. A flip chip manufacturing method comprising:
 (a) forming a seed layer on a substrate by using a conductive thin layer;   (b) applying and patterning a photoresist or a dry film;   (c) forming gold bumps by electroplating;   (d) patterning the seed layer to form a metal pattern;   (e) forming an insulating layer on the seed layer and the upper end of the gold bumps; and   (f) applying and patterning a photoresist or a dry film so as to pattern the insulating layer,   wherein the metal pattern forms electrical connection between the gold bumps, and the polarity of the photo-resist or a dry film in the step (b) is opposite to the polarity of photoresist or a dry film in the step (f),   wherein the step (b) of applying and patterning a photoresist or a dry film comprises:
 forming a first photoresist layer over the seed layer; and 
 patterning the first photoresist layer with a first mask to form at least two openings through the first photoresist layer to expose the seed layer; 
   wherein the step (c) of forming gold bumps comprises electroplating gold in the at least to openings to form at least two gold bumps, in which the seed layer works as an electrode for electroplating so that no separate electrode wire for electroplating is needed to form the at least two gold bumps;   wherein subsequent to electroplating, the first photoresist layer covering the seed layer is removed to provide an intermediate structure comprising the substrate, the seed layer on the substrate, and the gold bumps on the seed layer;   wherein the step (d) of patterning the seed layer to form a metal pattern comprises:
 forming a second photoresist layer over the intermediate structure such that second photoresist layer covers the at least two gold bumps, covers a first portion of the seed layer, and does not cover a second portion of the seed layer, 
 subsequently etching the second portion of the seed layer that is not covered by the second photoresist layer while maintaining the at least two gold bumps and also maintaining the first portion of the seed layer that are covered by the second photoresist layer, and 
 subsequently removing the second photoresist layer to provide the metal pattern that comprises the first portion of the seed layer and does not comprise the second portion of the seed layer; 
   wherein the step of (e) forming an insulating layer provides the insulating layer over the upper end of the gold bumps and also over the first portion of the seed layer that interconnects the two gold bumps;   wherein the step of (f) applying and patterning a photoresist or a dry film comprises:
 forming a third photoresist layer over the insulating layer, 
 patterning the third photoresist layer using a second mask such that the third photoresist layer stays over the insulating layer formed over the first portion of the seed layer while exposing the insulating layer formed over the upper end of the gold bumps is exposed, 
 subsequently etching the insulating layer formed over the upper end of the gold bumps to expose the upper end of the gold bump while maintaining the third photoresist layer staying over the insulating layer formed over the first portion of the seed layer, and 
 subsequently, removing the third photoresist layer to provide a flip chip device comprising the substrate, the metal pattern, the at least two gold bumps, and the insulating layer, wherein the metal pattern is formed on the substrate and comprises the first portion of the seed layer that interconnects the at least two gold bumps, wherein the insulating layer remains over the first portion of the seed layer. 
   
     
     
       23. The method of claim 22, wherein etching the second portion of the seed layer exposes a portion of the substrate, wherein subsequent to removing the second photoresist layer the portion of the substrate is still exposed, wherein the insulating layer is formed on the portion of the substrate in addition to on the upper end of the gold bumps and on the first portion of the seed layer, wherein the third photoresist layer formed over the insulating layer is also over the portion of the substrate, wherein the third photoresist layer formed over the portion of the substrate remains after patterning the third photoresist layer, wherein the third photoresist layer formed over the portion of the substrates remains after etching the exposed insulating layer, wherein after removing the third photoresist layer, the insulating layer over the portion of the substrate is exposed in the flip chip device. 
     
     
       24. The method of claim 22, wherein the substrate comprises an insulation layer on top such that the seed layer is formed on the insulation layer of the substrate. 
     
     
       25. The method of claim 22, wherein the photoresist of the first photoresist layer has a positive polarity, and the photoresist of the third photoresist layer has a negative polarity. 
     
     
       26. The method of claim 22, wherein the seed layer comprises an adhesion layer and an electrode layer.