USRE47456EActiveUtility

Pattern transfer apparatus and method for fabricating semiconductor device

Assignee: TOSHIBA MEMORY CORPPriority: Aug 31, 2011Filed: Apr 29, 2016Granted: Jun 25, 2019
Est. expiryAug 31, 2031(~5.1 yrs left)· nominal 20-yr term from priority
Inventors:Yuji Kobayashi
G03F 7/0002B82Y 10/00B82Y 40/00
89
PatentIndex Score
3
Cited by
16
References
51
Claims

Abstract

A pattern transfer apparatus according to one embodiment includes a transfer region selecting part that performs operation in which when performing pattern transfer from a template provided with N transfer regions (N is an integer of 2 or larger) to a transferring substrate a plurality of times, 1 to N−1 transfer regions, which are to be used to perform the transfer to regions of the transferring substrate corresponding to part of the N transfer regions, are selected such that the number of the transfer to be performed using each of the N transfer regions is evened out.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A pattern transfer apparatus comprising a transfer region selecting part that performs an operation in which when performing pattern transfer from a template provided with N transfer regions (N is an integer of 2 or larger) to a transferring substrate a plurality of times, 1 to N−1 transfer regions, which are to be used to perform the pattern transfer to regions of the transferring substrate corresponding to part of the N transfer regions, are selected such that the a number of the transfer pattern transfers to be performed using each of the N transfer regions is evened out. 
     
     
       2. The pattern transfer apparatus according to  claim 1 , further comprising a transfer order setting part which sets an order of the pattern transfer to the transferring substrate such that the transfer regions that have not been selected when selecting the 1 to N−1 transfer regions do not collide with each of transfer-performed regions of the transferring substrate. 
     
     
       3. The pattern transfer apparatus according to  claim 1 , wherein the transfer region selecting part selects the transfer regions such that the a number of the transfer pattern transfers to M transferring substrates (M is a positive integer) to be performed using each of the N transfer regions is evened out. 
     
     
       4. The pattern transfer apparatus according to  claim 1 , wherein each of the transfer regions corresponds to a chip region of a wafer used as the transferring substrate. 
     
     
       5. The pattern transfer apparatus according to  claim 4 , wherein a pattern forming region of the wafer is provided with a shot region corresponding to the N transfer regions, there is a region where imperfect shot will result at a perimeter of the pattern forming region, and only part of the N transfer regions of the template is used when performing pattern transfer to the region where the imperfect shot will result. 
     
     
       6. The pattern transfer apparatus according to  claim 5 , further comprising a transfer order setting part that sets an order of pattern transfer to the shot region of the pattern forming region and to the region where the imperfect shot will result of the wafer such that an unused transfer region of the N transfer regions does not collide with an adjacent pattern-transferred shot region when performing pattern transfer to the region where the imperfect shot will result. 
     
     
       7. A pattern transfer apparatus comprising:
 a stage that holds a wafer used as a transferring substrate; 
 driving parts that move the stage back and forth, and right and left; 
 a nozzle that delivers an imprinting material onto the wafer; 
 an ultraviolet irradiating unit that irradiates the imprinting material on the wafer with ultraviolet light via a template provided with N transfer regions (N is an integer of 2 or larger); and 
 a driving control unit that controls the driving parts so as to even out the a number of pattern transfer transfers to be performed using each of the N transfer regions. 
 
     
     
       8. The pattern transfer apparatus according to  claim 7 , wherein the driving control unit comprises a transfer region selecting part that performs operation in which when performing pattern transfer from the template provided with the N transfer regions to the transferring substrate a plurality of times such that the a number of the transfer pattern transfers to be performed using each of the N transfer regions is evened out, 1 to N−1 transfer regions, which are to be used to perform the pattern transfers to regions of the transferring substrate corresponding to part of the N transfer regions, are selected. 
     
     
       9. The pattern transfer apparatus according to  claim 8 , wherein the driving control unit further comprises a transfer order setting part that sets an order of pattern transfer to the transferring substrate such that the transfer regions, which have not been selected when selecting the 1 to N−1 transfer regions, do not collide with each of transfer-performed regions of the transferring substrate. 
     
     
       10. The pattern transfer apparatus according to  claim 8 , wherein the transfer region selecting part selects the transfer regions such that the number of the transfer to M transferring substrates (M is a positive integer) to be performed using each of the N transfer regions is evened out. 
     
     
       11. The pattern transfer apparatus according to  claim 7 , wherein the each of transfer regions corresponds to a chip region of the wafer used as the transferring substrate. 
     
     
       12. The pattern transfer apparatus according to  claim 11 , wherein a pattern forming region of the wafer is provided with a shot region corresponding to the N transfer regions, there is a region where imperfect shot will result at a perimeter of the pattern forming region, and only part of the N transfer regions of the template is used when performing pattern transfer to the region where the imperfect shot will result. 
     
     
       13. The pattern transfer apparatus according to  claim 12 , wherein the driving control unit comprises a transfer order setting part that sets an order of pattern transfer to the shot region of the pattern forming region and to the region where the imperfect shot will result of the wafer such that when performing pattern transfer to the region where the imperfect shot will result, an unused transfer region of the N transfer regions does not collide with an adjacent pattern-transferred shot region. 
     
     
       14. A method for fabricating a semiconductor device comprising:
 forming imprinting patterns by repeating process wherein when performing pattern transfer to regions of a transferring substrate corresponding to part of N transfer regions (N is an integer of 2 or larger) provided at a template, 1 to N−1 transfer regions are selected such that the a number of the transfer pattern transfers to be performed using each of the N transfer regions is evened out, and the pattern transfer is performed by applying an imprinting material onto an underlying layer of the transferring substrate and pressing the template on the imprinting material; and 
 processing the underlying layer via the imprinting patterns formed on the underlying layer. 
 
     
     
       15. The method for fabricating a semiconductor device according to  claim 14 , wherein concave portions corresponding to the imprinting patterns are formed in the template, and the imprinting patterns are irradiated with ultraviolet light through the template with the template pressed on the imprinting material to cure the imprinting patterns. 
     
     
       16. The method for fabricating a semiconductor device according to  claim 14 , wherein an order of the pattern transfer to the transferring substrate is set such that the transfer regions, which have not been selected when selecting the 1 to N−1 transfer regions, do not collide with each of transfer-performed regions of the transferring substrate. 
     
     
       17. The method for fabricating a semiconductor device according to  claim 14 , wherein the transfer regions are selected such that the a number of the transfer pattern transfers to the M transferring substrates (M is a positive integer) performed using each of the N transfer regions is evened out. 
     
     
       18. The method for fabricating a semiconductor device according to  claim 14 , wherein each of the transfer regions corresponds to a chip region of a wafer used as the transferring substrate. 
     
     
       19. The method for fabricating a semiconductor device according to  claim 18 , wherein a pattern forming region of the wafer is provided with a shot region corresponding to the N transfer regions. 
     
     
       20. The method for fabricating a semiconductor device according to  claim 19 , wherein there is a region where imperfect shot will result at a perimeter of the pattern forming region, and only part of the N transfer regions of the template is used when performing pattern transfer to the region where the imperfect shot will result. 
     
     
       21. A method for fabricating a semiconductor device comprising:
 forming, sequentially using a template, a plurality of patterns on one or more substrates, the template including a first template region with a first template pattern and a second template region with a second template pattern, the plurality of patterns including a first chip pattern and a second chip pattern respectively corresponding to the first template pattern and the second template pattern; and   processing the one or more substrates based on the plurality of patterns formed on the one or more substrates;   wherein the first chip pattern is formed on the one or more substrates a first number of times;   wherein the second chip pattern is formed on the one or more substrates a second number of times; and   wherein the first number and the second number are equal.   
     
     
       22. The method of claim 21, wherein each of the first template region and the second template region corresponds to a chip region to be formed on the one or more substrates. 
     
     
       23. The method of claim 21, wherein the forming of a plurality of patterns on one or more substrates comprises:
 forming the first chip pattern on a first chip region of one substrate of the one or more substrates; and   after forming the first chip pattern on the first chip region, forming the first chip pattern and the second chip pattern on a second chip region of the one substrate.   
     
     
       24. The method of claim 23, wherein the forming the first chip pattern on a first chip region of one substrate of the one or more substrates comprises:
 depositing, by a nozzle, an imprinting material on the first chip region; and   moving, by a driver, the template to cause the first template region to press on the imprint material deposited on the first chip region.   
     
     
       25. The method of claim 24, wherein when the first template region is pressed on the imprint material on the first chip region, the second template region overlaps with at least a part of a non-pattern forming region of the one substrate. 
     
     
       26. The method of claim 24, wherein when the first template region is pressed on the imprint material on the first chip region, the second chip pattern region overlaps with at least a part of a chip pattern forming region of the one substrate. 
     
     
       27. The method of claim 24, wherein when the first template region is pressed on the imprint material on the first chip region, the second chip pattern region overlaps with at least a part of the second chip region. 
     
     
       28. The method of claim 21, wherein the forming of the first chip pattern and the second chip pattern on a second chip region of the one substrate comprises:
 controlling a nozzle to deposit an imprinting material on the second chip region; and   controlling one or more drivers to move at least one of the template and the one substrate to cause the first template region and the second template region to press on the imprint material deposited on the second chip region.   
     
     
       29. The method of claim 21, wherein the first chip pattern and the second chip pattern are identical. 
     
     
       30. The method of claim 21, wherein the processing of the one or more substrates based on the plurality of patterns formed on the one or more substrates comprises:
 irradiating, by an irradiation unit through the template, the plurality of patterns on the one or more substrates with ultraviolet light.   
     
     
       31. The method of claim 21, wherein the plurality of patterns are formed on two substrates; and wherein the first number and the second number are equal. 
     
     
       32. The method of claim 31, wherein the forming of the plurality of patterns comprises:
 forming a first chip pattern on a first chip region of a first substrate of the two substrates;   forming a second chip pattern on a second chip region of the first substrate;   forming the first chip pattern on a third chip region and on a fourth chip region of a second substrate of the two substrates;   wherein the first chip region corresponds to the third chip region, and wherein the second chip region corresponds to the fourth chip region.   
     
     
       33. The method of claim 31,
 wherein the first chip pattern is formed on the first substrate a third number of times;   wherein the first chip pattern is formed on the second substrate a fourth number of times;   wherein the second chip pattern is formed on the second substrate a fifth number of times; and   wherein the second chip pattern is formed on the second substrate a sixth number of times.   
     
     
       34. The method of claim 33, wherein the third number and the fourth number are different; wherein the fifth number and the sixth number are different. 
     
     
       35. The method of claim 33, wherein the third number and the fourth number are equal; wherein the fifth number and the sixth number are equal. 
     
     
       36. A pattern transfer apparatus comprising:
 a driving control unit configured to use a template to, sequentially, form a plurality of patterns on one or more substrates, the template including a first template region with a first template pattern and a second template region with a second template pattern, the plurality of patterns including a first chip pattern and a second chip pattern respectively corresponding to the first template pattern and the second template pattern; and   an irradiating unit configured to process the one or more substrates based on the plurality of patterns formed on the one or more substrates;   wherein the first chip pattern is formed on the one or more substrates for a first number of times;   wherein the second chip pattern is formed on the one or more substrates for a second number of times; and   wherein the first number and the second number are equal.   
     
     
       37. The pattern transfer apparatus of claim 36, wherein each of the first template region and the second template region corresponds to a chip region to be formed on the one or more substrates. 
     
     
       38. The pattern transfer apparatus of claim 36, wherein the forming of a plurality of patterns on one or more substrates comprises the driving control unit being configured to cause the template to:
 form the first chip pattern on a first chip region of one substrate of the one or more substrates; and   after forming the first chip pattern, form the first chip pattern and the second chip pattern on a second chip region of the one substrate.   
     
     
       39. The pattern transfer apparatus of claim 38, wherein the forming of a first chip pattern on a first chip region of one substrate of the one or more substrates comprises the driving control unit being configured to:
 control a nozzle to deposit an imprint material on the first chip region; and   control one or more drivers to move at least one of the template and the one substrate to cause the first template region to press on the imprint material on the first chip region.   
     
     
       40. The pattern transfer apparatus of claim 39, wherein when the first template region is pressed on the imprint material on the first chip region, the second template region overlaps with at least a part of a non-pattern forming region of the one substrate. 
     
     
       41. The pattern transfer apparatus of claim 39, wherein when the first template region is pressed on the imprint material on the first chip region, the second chip pattern region overlaps with at least a part of a pattern forming region of the one substrate. 
     
     
       42. The pattern transfer apparatus of claim 39, wherein when the first template region is pressed on the imprint material on the first chip region, the second chip pattern region overlaps with at least a part of the second chip region. 
     
     
       43. The pattern transfer apparatus of claim 36, wherein the forming of the first chip pattern and the second chip pattern on a second chip region of the one substrate comprises the driving control unit being configured to:
 control a nozzle to deposit an imprint material on the second chip region; and   control one or more drivers to move at least one of the template and the one substrate to cause the first template region and the second template region to press on the imprint material deposited on the second chip region.   
     
     
       44. The pattern transfer apparatus of claim 36, wherein the first chip pattern and the second chip pattern are identical. 
     
     
       45. The pattern transfer apparatus of claim 36, wherein the processing the one or more substrates based on the plurality of patterns formed on the one or more substrates comprises the ultraviolet irradiation unit being configured to:
 irradiate, through the template, the plurality of patterns formed on the one or more substrates with ultraviolet light.   
     
     
       46. The pattern transfer apparatus of claim 36, wherein the plurality of patterns are formed on two substrates of the one or more substrates; and wherein the first number and the second number are equal. 
     
     
       47. The pattern transfer apparatus of claim 46, wherein the forming of the plurality of patterns comprises the driving control unit being configured to cause the template to:
 form a first chip pattern on a first chip region of a first substrate of the two substrates;   form a second chip pattern on a second chip region of the first substrate;   form the first chip pattern on a third region and on a fourth region of a second substrate of the two substrates;   wherein the first chip region corresponds to the third chip region, and wherein the second chip region corresponds to the fourth chip region.   
     
     
       48. The pattern transfer apparatus of claim 46,
 wherein the first chip pattern is formed on the first substrate a third number of times;   wherein the first chip pattern is formed on the second substrate a fourth number of times;   wherein the second chip pattern is formed on the second substrate a fifth number of times; and   wherein the second chip pattern is formed on the second substrate a sixth number of times.   
     
     
       49. The pattern transfer apparatus of claim 48, wherein the third number and the fourth number are different; and wherein the fifth number and the sixth number are different. 
     
     
       50. The pattern transfer apparatus of claim 48, wherein the third number and the fourth number are equal; and wherein the fifth number and the sixth number are equal. 
     
     
       51. The pattern transfer apparatus of claim 36, further comprising a stage adapted to hold a wafer that includes one substrate of the one or more substrates; wherein the driver control unit is configured to control one or more drivers to move at least one of the stage and the template to sequentially form the plurality of patterns on the one substrate.

Join the waitlist — get patent alerts

Track USRE47456E — get alerts on status changes and closely related new filings.

We store only your email — no account needed. See our privacy policy.