Method of manufacturing a MOSFET structure

Abstract

A method of forming a MOSFET is provided. The method comprises forming a relatively thin layer of dielectric on a substrate. Depositing a gate material layer on the relatively thin layer of dielectric. Removing portions of the gate material layer to form a first and second gate material regions of predetermined lateral lengths. Introducing a first conductivity type dopant in the substrate to form a top gate using first edges of the first and second gate material regions as masks, Introducing a second conductivity dopant of high dopant density in the substrate to form a drain region adjacent the surface of the substrate using a second edge of the second gate material region as a mask to form a first edge of the drain region, wherein a spaced distance between the top gate and the drain region is determined by the lateral length of the second gate material region.

What is claimed is: 
     
       1. A method of forming a high voltage MOSFET for an integrated circuit, the method comprising:
 forming a relatively thin layer of dielectric on a surface of a substrate;   depositing a gate material layer on the relatively thin layer of dielectric;   removing portions of the gate material layer to form first and second gate material regions of predetermined lateral lengths;   introducing a first conductivity type dopant in the substrate to form a top gate using first edges of the first and second gate material regions as masks, wherein the top gate is formed adjacent the surface of the substrate and laterally between the first and second gate material regions;   introducing a second conductivity dopant of high dopant density in the substrate to form a drain region adjacent the surface of the substrate using a second edge of the second gate material region as a mask to form a first edge of the drain region, wherein the second gate material region is positioned laterally between the drain region and the top gate; and   wherein the spaced distance between the top gate and the drain region is determined by the lateral length of the second gate material region.   
     
     
       2. The method of  claim 1 , wherein the drain region is formed to extend deeper from the surface of the substrate than the top gate, further wherein the drain region is formed with a higher doping density at every depth than the top gate. 
     
     
       3. The method of  claim 1 , wherein the removing of portions of the gate material layer further forms a third gate material region of a predetermined lateral length, wherein a edge of the third gate material region is used as a mask to form a second edge of the drain region. 
     
     
       4. The method of  claim 3 , wherein the second and third gate material regions are left floating. 
     
     
       5. The method of  claim 3 , further comprising:
 coupling the second and third gate material regions to the drain region.   
     
     
       6. The method of  claim 3 , wherein the third gate material region is connected to the second gate material region, the second and third gate material regions forming a central opening, wherein the drain region is formed through the central opening. 
     
     
       7. The method of  claim 1 , further comprising:
 introducing the second conductivity type dopant of high density to the substrate to form a source region adjacent the first gate material region, wherein the first gate material region is generally positioned laterally between the source region and the top gate.   
     
     
       8. The method of  claim 7 , wherein an edge of the first gate material region is used as a mask to form an edge of the source region. 
     
     
       9. The method of  claim 7 , further comprising:
 introducing the first conductivity type dopant to the substrate to form a body region, the body region being positioned adjacent the surface of the substrate and the source; and   introducing a first conductivity dopant of a high density in the body region to form a body contact, wherein the body contact is positioned adjacent the surface of the substrate and a portion of the source.   
     
     
       10. The method of  claim 1 , further comprising:
 forming a first drift region of a second conductivity type dopant in the substrate using a first edge of the second gate material region as a mask; and   forming a second drift region of the second conductivity type dopant in the substrate using a second edge of the second gate material region as a mask.   
     
     
       11. The method of  claim 10 , further comprising:
 diffusing the first and second drift regions to form an overlap third region under the second gate material region.   
     
     
       12. The method of  claim 10 , further comprising:
 forming a well region in the substrate of the second conductivity type to reduce resistance within the first and second drift regions, wherein portions of the first and second drift regions are formed in the well.   
     
     
       13. The method of  claim 10 , wherein the first and second drift regions are spaced apart from each other by the width of the second gate material region. 
     
     
       14. A method of forming a lateral MOSFET in an integrated circuit, the method comprising:
 forming a drain contact of a second conductivity type with a high density dopant in a substrate adjacent a surface of the substrate;   forming a top gate of a first conductivity type in the substrate adjacent the surface of the substrate and a predetermined distance from the drain contact after the drain contact is formed; and   wherein the drain contact is formed to extend deeper from the surface of the substrate than the top gate and is formed to have a higher dopant density at every depth than the top gate so a mask is not needed to shield the drain contact from the first conductivity dopants during formation of the top gate.   
     
     
       15. The method of  claim 14 , further comprising:
 forming a relatively thin dielectric layer on a surface of a substrate, the substrate being of a first conductivity type with a low dopant density; and   depositing a gate on the surface on the relatively thin dielectric layer.   
     
     
       16. The method of  claim 14 , further comprising:
 forming a source of the second conductivity type with a high dopant density in the substrate approximate the gate, wherein the source is formed to extend deeper from the surface of the substrate than the top gate and is formed to have a higher dopant density at every depth than the top gate so a mask is not needed to shield the source from the first conductivity dopants during formation of the top gate.   
     
     
       17. The method of  claim 14 , wherein forming the distance between the drain contact and the top gate further comprises:
 forming a relatively thick layer of material having a predetermined lateral length on the surface of the substrate;   introducing high density dopants of the second conductivity type to the substrate to form the drain contact, wherein a first edge of the relatively thick layer of material defines a first edge of drain contact; and   introducing dopants of the first conductivity type to the substrate to form the top gate, wherein a second edge of the relatively thick layer of material defines a first edge of the top gate, further wherein the distance between the top gate and the drain contact is defined by the lateral length of the relatively thick layer of material.   
     
     
       18. The method of  claim 17 , wherein the relatively thick layer of material is a layer of dielectric. 
     
     
       19. The method of  claim 17 , wherein the relatively thick layer of material is a layer of gate material. 
     
     
       20. A device comprising:
 a substrate having a surface;   a relatively thin layer of dielectric material on the surface of the substrate;   a relatively thick layer of dielectric material on the surface of the substrate adjacent to the relatively thin layer of dielectric material;   a drain region of a first conductivity type with a higher dopant density in the substrate adjacent to the surface of the substrate; and   a drift region of the first conductivity type with a lower dopant density in the substrate adjacent to the surface of the substrate, the drift region comprising a first portion having a junction depth less than the junction depths of adjacent portions on opposite sides of the first portion.   
     
     
       21. The device of claim 20, wherein the first portion of the drift region has a lower dopant density than the adjacent portions on opposite sides of the first portion. 
     
     
       22. The device of claim 20, wherein the first portion of the drift region is located below the relatively thick layer of dielectric material. 
     
     
       23. The device of claim 20, wherein the first portion of the drift region comprises overlapped diffused edges of a first conductivity type dopant. 
     
     
       24. The device of claim 20, wherein the first portion of the drift region comprises overlapped diffused edges of a first conductivity type dopant masked by the relatively thick layer of dielectric material. 
     
     
       25. The device of claim 20, wherein the drain region has an edge defined by an edge of the relatively thick layer of dielectric material. 
     
     
       26. The device of claim 20, further comprising a gate region on the relatively thin layer of dielectric material. 
     
     
       27. The device of claim 20, further comprising a body region of a second conductivity type in the substrate adjacent to the surface of the substrate. 
     
     
       28. The device of claim 27, further comprising a source region of the first conductivity type with a higher dopant density in the body region. 
     
     
       29. The device of claim 28, further comprising a body contact of the second conductivity type with a higher dopant density in the body region adjacent to the source region. 
     
     
       30. A device comprising:
 a first dielectric layer on a surface of a substrate;   a second dielectric layer on the surface of the substrate adjacent to the first dielectric layer, the second dielectric layer having a thickness greater than the thickness of the first dielectric layer;   a drain region of a first conductivity type in the substrate adjacent to the surface of the substrate; and   a drift region of the first conductivity type in the substrate adjacent to the surface of the substrate, the drift region comprising a first portion having a lower doping density than the doping densities of adjacent portions on opposite sides of the first portion.   
     
     
       31. The device of claim 30, further comprising a gate region on the first dielectric layer. 
     
     
       32. The device of claim 30, further comprising a body region of a second conductivity type in the substrate adjacent to the surface of the substrate. 
     
     
       33. The device of claim 32, further comprising a source region of the first conductivity type in the body region. 
     
     
       34. The device of claim 33, further comprising a body contact of the second conductivity type in the body region adjacent to the source region.