System and method for expansion of a computer

Abstract

A system and method for interfacing at least one ISA and/or PCI compliant device with a PCMCIA compliant socket on a host computer is disclosed. The system is particularly useful to allow ISA and/or PCI compliant devices, which could not otherwise be used with a portable computer having a PCMCIA socket, to be used with such computers. The system can provide complete compatibility between a PCMCIA socket and ISA /PCI compliant devices even though such industry standards include contradictory requirements. The system allows a user to easily connect and disconnect numerous ISA and/or PCI compliant devices via a single PCMCIA socket commonly found on portable computers. Preferably included in the system are structures to carry out the functions of: interrupt translation between the PCMCIA port and the ISA devices; direct memory access translation between the PCMCIA port and the ISA devices; translation of a buss address latch enable signal between the PCMCIA port and the ISA devices; translation between a memory read signal and a memory write signal of the PCMCIA port and a system memory read signal and a system memory write signal of the ISA devices; translation between the PCMCIA port and 8 bit ISA devices; DRAM refresh of the ISA devices; providing a clock signal to the ISA devices; supplying power to the ISA devices; and, translation of the timing between the PCMCIA port and the ISA devices.

What is claimed is: 
     
       1. A system for providing translation between a host computer having a first port, the first port compliant with a first standard, the first standard being selected from the group consisting of PCMCIA and Card Bus, and a hardware device which is compliant with a second standard, the second standard being selected from the group consisting of ISA and PCI, the first standard and the second standard being non-compatible with each other, the system comprising:
 means for direct memory access translation between the host computer and the hardware device;   means for supplying power to the hardware device; and   means for translating the timing between the host computer and the hardware device such that the host computer and the hardware device are interfaced and the functions of the hardware device are provided to the host computer.   
     
     
       2. A system as defined in  claim 1  wherein the first standard is the PCMCIA standard and wherein the second standard is the ISA standard. 
     
     
       3. A system as defined in  claim 1  wherein the first standard is the PCMCIA standard and wherein the second standard is the PCI standard. 
     
     
       4. A system as defined in  claim 1  further comprising means for interrupt translation between the host computer and the hardware device. 
     
     
       5. A system as defined in  claim 1  wherein the hardware device comprises at least one ISA compliant add-on printed circuit card. 
     
     
       6. A system as defined in  claim 1  wherein the hardware device comprises at least one PCI compliant add-on printed circuit card. 
     
     
       7. A system as defined in  claim 1  wherein means for direct memory access translation comprises:
 a DMA register; and 
 a DMA controller. 
 
     
     
       8. A system as defined in  claim 1  wherein the means for supplying power to the hardware device comprises:
 means for supplying +12 volts; 
 means for supplying −12 volts; 
 means for supplying +5 volts; and 
 means for supplying −5 volts; 
 all at a current required to operate the hardware device. 
 
     
     
       9. A system as defined in  claim 1  wherein the port comprises a PCMCIA socket. 
     
     
       10. A system as defined in  claim 1  wherein the means for translating the timing comprises a read/write timing generator. 
     
     
       11. A system for providing translation between a host computer having a first port, the first port compliant with a first standard, the first standard being selected from the group consisting of PCMCIA and CardBus, and a hardware device which is compliant with a second standard, the second standard being selected from the group consisting of ISA and PCI, the first standard and the second standard being non-compatible with each other and the hardware device requiring support for a plurality of interrupts, the system comprising:
 means for interrupt translation between the host computer and the hardware device and for providing interrupt support for a plurality of interrupt request levels;   means for supplying power to the hardware device; and   means for translating the timing between the host computer and the hardware device such that the host computer and the hardware device are interfaced and the functions of the hardware device are provided to the host computer.   
     
     
       12. A system as defined in  claim 11  wherein the first standard is the PCMCIA standard and wherein the second standard is the ISA standard. 
     
     
       13. A system as defined in  claim 11  wherein the first standard is the PCMCIA standard and wherein the second standard is the PCI standard. 
     
     
       14. A system as defined in  claim 11  wherein the means for interrupt translation comprises means for translating multiple interrupts required by the hardware device to a single interrupt. 
     
     
       15. A system as defined in  claim 14  wherein the multiple interrupts comprises at least five interrupts. 
     
     
       16. A system as defined in  claim 11  wherein the hardware device comprises at least one ISA compliant add-on circuit card. 
     
     
       17. A system as defined in  claim 11  wherein the hardware device comprises at least one PCI compliant add-on circuit card. 
     
     
       18. A system as defined in  claim 11  further comprising means for direct memory access translation. 
     
     
       19. A system as defined in  claim 11  wherein the means for supplying power to the hardware device comprises:
 means for supplying +12 volts; 
 means for supplying −12 volts; 
 means for supplying +5 volts; and 
 means for supplying −5 volts; 
 all at a current required to operate the hardware device. 
 
     
     
       20. A system as defined in  claim 11  wherein the port comprises a PCMCIA socket. 
     
     
       21. A system as defined in  claim 11  wherein the means for translating the timing comprises a read/write timing generator. 
     
     
       22. A system for expanding a host computer having a PCMCIA compliant port and allowing the host computer to interface with at least one ISA compliant device, the system comprising:
 means for making electrical and physical connection to the PCMCIA compliant port;   means for making electrical connection to the at least one ISA compliant device;   means for interrupt translation between the PCMCIA port and the at least one ISA compliant device;   means for direct memory access translation between the PCMCIA port and the at least one ISA compliant device;   means for providing a clock signal to the ISA compliant device;   means for supplying power to the at least one ISA compliant device; and   means for translating the timing between the PCMCIA port and the ISA compliant device such that the host computer can utilize the functions of the at least one ISA compliant device.   
     
     
       23. A system as defined in  claim 22  wherein the at least one ISA compliant device comprises an ISA compliant add-on card and wherein the system further comprises a serial port, a parallel port, a key board port, and a mouse port. 
     
     
       24. A system as defined in  claim 22  further comprising means for providing DRAM refresh to the ISA compliant device. 
     
     
       25. A system as defined in  claim 22  wherein the means for supplying power comprises:
 means for supplying +12 volts; 
 means for supplying −12 volts; 
 means for supplying +5 volts; and 
 means for supplying −5 volts; 
 all at a current required to operate the hardware device. 
 
     
     
       26. A system as defined in  claim 22  wherein the means for providing a clock signal comprises means for providing an 8 MHz clock signal and means for providing a 14.318 MHz clock signal. 
     
     
       27. A system as defined in  claim 22  further comprising:
 means for translating a buss address latch enable signal between the PCMCIA port and the at least one ISA compliant device; 
 means for translating between a memory read signal and a memory write signal of the PCMCIA port and a system memory read signal and a system memory write signal for the at least one ISA compliant device; and 
 means for translation between the PCMCIA port and an 8 bit ISA compatible add-on card. 
 
     
     
       28. A method for providing translation between a host computer having a first port, the first port compliant with a first standard, the first standard being selected from the group consisting of PCMCIA and CardBus, and a hardware device which is compliant with a second standard, the second standard being selected from the group consisting of ISA and PCI, the first standard and the second standard being non-compatible with each other and the hardware device requiring support for a plurality of interrupts, the method comprising the steps of:
 direct memory access translation between the host computer and the hardware device;   translating between the interrupts of the host computer and the plurality of interrupts of the hardware device;   supplying power to the hardware device; and   translating the timing between the host computer and the hardware device such that the host computer and the hardware device are interfaced and the functions of the hardware device are provided to the host computer.   
     
     
       29. A method for providing translation between a host computer having a first port, the first port compliant with a first standard, the first standard being selected from the group consisting of PCMCIA and CardBus, and a hardware device which is compliant with a second standard, the second standard being selected from the group consisting of ISA and PCI, the first standard and the second standard is being non-compatible with each other, the method comprising the steps of:
 direct memory access translation between the host computer and the hardware device;   supplying power to the hardware device; and   translating the timing between the host computer and the hardware device such that the host computer and the hardware device are interfaced and the functions of the hardware device are provided to the host computer.   
     
     
       30. A method for expanding a host computer having a PCMCIA compliant port and allowing the host computer to interface with at least one ISA compliant device, the method comprising the steps of:
 making electrical and physical connection to the PCMCIA compliant port;   making electrical connection to the at least one ISA compliant device;   translation between the PCMCIA port interrupt and the interrupts of the at least one ISA compliant device;   direct memory access translation between the PCMCIA port and the at least one ISA compliant device;   providing a clock signal to the ISA compliant device;   supplying power to the at least one ISA compliant device; and   translating the timing between the PCMCIA port and the ISA compliant device such that the host computer can utilize the functions of the at least one ISA compliant device.   
     
     
       31. A system including:
 an interface operable with a computer having software for communicating with an ISA or PCI compliant device, comprising:
 a module configured to communicate with a computer PCMCIA compliant socket, the module further configured to communicate with a physically remote ISA or PCI compliant device without requiring modification of the computer software operable to communicate with the physically remote ISA or PCI compliant device.  
   
     
     
       32. The system of claim 31 wherein the interface is configured to interface a plurality of said physically remote ISA or PCI compliant devices having different interrupt requests to the computer.  
     
     
       33. The system of claim 32 wherein the interface is configured to interface with the PCMCIA compliant socket configured to support only 1 interrupt request.  
     
     
       34. The system of claim 31 wherein the module is configured to communicate with an physically remote ISA or PCI compliant device which requires direct memory access and with the computer that does not provide direct memory access.  
     
     
       35. The system of claim 31 wherein said module includes electronics configured to communicate with both the PCMCIA compliant socket and the physically remote ISA or PCI compliant device.  
     
     
       36. A system including:
 interface means operable with a computer having software for communicating with an ISA or PCI compliant device, comprising:
 means configured to communicate with a computer PCMCIA compliant socket, the means further configured to communicate with an physically remote ISA or PCI compliant device without requiring modification of the computer software operable to communicate with the physically remote ISA or PCI compliant device.  
   
     
     
       37. The system of claim 36 wherein the interface includes means configured to interface a plurality of said physically remote ISA or PCI compliant devices having different interrupt requests.  
     
     
       38. The system of claim 37 wherein the interface includes means configured to interface with the PCMCIA compliant socket support only 1 interrupt request.  
     
     
       39. The system of claim 36 wherein the interface includes means configured to communicate with an physically remote ISA or PCI compliant device which requires direct memory access and with the computer that does not provide direct memory access.  
     
     
       40. The system of claim 36 wherein said means configured to communicate includes means configured to communicate with both the PCMCIA compliant socket and the physically remote ISA or PCI compliant device.