USRE43404EExpiredUtility

Methods for providing void-free layer for semiconductor assemblies

Individually held — no corporate assignee on recordPriority: Mar 7, 1996Filed: Mar 22, 2010Granted: May 22, 2012
Est. expiryMar 7, 2016(expired)· nominal 20-yr term from priority
H10W 72/0198H10W 74/15H10W 99/00H10W 72/07331H10W 72/261H10W 72/072H10W 72/241H10W 80/334H10W 80/335H10W 90/724H10W 72/381H10W 90/794H10W 90/734H10W 70/453H10W 74/111H10W 74/129H10W 74/016H10W 74/014H10W 74/019H10P 72/74
78
PatentIndex Score
4
Cited by
142
References
27
Claims

Abstract

A method of providing a substantially void free layer for one or more flip chip assemblies, or one or more microelectronic components, utilizing a curable encapsulant. Also disclosed is a method of injecting an encapsulant into an assembly and a method of treating a microelectronic component to form a void free layer.

Claims

exact text as granted — not AI-modified
1. A method of providing a substantially void free underfill for a flip chip assembly, comprising:
 electrically connecting a plurality of contact pads on a surface of a semiconductor chip to corresponding bond pads on a circuitized substrate such that the connections create a gap between the chip and the substrate, wherein the substrate is rigid;   sealing the gap between the chip and the substrate with a fluid, curable encapsulant so that there is a void therebetween;   applying pressure to the assembly causing the encapsulant to flow into the gap and around the connections; and   applying energy to the assembly in order to cure the encapsulant.   
     
     
       2. The method as claimed in  claim 1 , wherein the pressure applying step is conducted for a time period that is between 30 minutes to several hours. 
     
     
       3. The method as claimed in  claim 1 , wherein the pressure applying includes gradually increasing the applied pressure. 
     
     
       4. A method of injecting an encapsulant between a face surface of a semiconductor chip and a juxtaposed substrate, comprising:
 providing a gap between the face surface of the chip and the substrate, wherein the substrate is rigid;   sealing each edge of the gap with a curable fluid encapsulant so that there is a void between the chip and the substrate;   applying pressure to cause the encapsulant to flow between the chip and the substrate; and   applying energy to cure the encapsulant.   
     
     
       5. The method as claimed in  claim 4 , wherein the pressure applying step is conducted for a time period that is between 30 minutes to several hours. 
     
     
       6. The method as claimed in  claim 4 , wherein the pressure applying includes gradually increasing the applied pressure. 
     
     
       7. The method as claimed in  claim 4 , wherein the applied pressure is between about 10 and 450 pounds per square inch. 
     
     
       8. The method as claimed in  claim 4 , wherein the applied pressure is between about 30 and 200 pounds per square inch. 
     
     
       9. The method as claimed in  claim 4  A method of injecting an encapsulant between a face surface of a semiconductor chip and a juxtaposed substrate, comprising:
 providing a gap between the face surface of the chip and the substrate, wherein the substrate is rigid; 
 sealing each edge of the gap with a curable fluid encapsulant so that there is a void between the chip and the substrate; applying pressure to cause the encapsulant to flow between the chip and the substrate; 
 and applying energy to cure the encapsulant, 
 wherein the gap providing step includes: providing compliant pads on the substrate, wherein each of the compliant pads includes a peelable tacky surface to which the face surface of the chip is releasably attached. 
 
     
     
       10. A method of providing a substantially void free underfill for a semiconductor wafer having a plurality of flip chip assemblies, comprising:
 electrically connecting a plurality of contact pads of flip chip assemblies disposed on a surface of a semiconductor wafer to corresponding bond pads on a circuitized substrate such that the connections create a gap between the flip chip assemblies and the substrate, wherein the substrate is rigid;   sealing the gap between the flip chip assemblies and the substrate with a fluid, curable encapsulant so that there is a void therebetween;   applying pressure to cause the encapsulant to flow into the gap and around the connections; and   applying energy to cure the encapsulant.   
     
     
       11. The method as claimed in  claim 10 , wherein the pressure applying step is conducted for a time period that is between 30 minutes to several hours. 
     
     
       12. The method as claimed in  claim 10 , wherein the pressure applying includes gradually increasing the applied pressure. 
     
     
       13. A method of injecting an encapsulant between a face surface of a semiconductor wafer and a juxtaposed substrate, comprising:
 providing a gap between the face surface of the wafer and the substrate, wherein the substrate is rigid;   sealing each edge of the gap with a curable fluid encapsulant so that there is a void between the wafer and the substrate;   applying pressure to cause the encapsulant to flow between the wafer and the substrate; and   applying energy to cure the encapsulant.   
     
     
       14. The method as claimed in  claim 13 , wherein the pressure applying step is conducted for a time period that is between 30 minutes to several hours. 
     
     
       15. The method as claimed in  claim 13 , wherein the pressure applying includes gradually increasing the applied pressure. 
     
     
       16. The method as claimed in  claim 13 , wherein the applied pressure is between about 10 and 450 pounds per square inch. 
     
     
       17. The method as claimed in  claim 13 , wherein the applied pressure is between about 30 and 200 pounds per square inch. 
     
     
       18. The method as claimed in  claim 13 , A method of injecting an encapsulant between a face surface of a semiconductor wafer and a juxtaposed substrate, comprising:
 providing a gap between the face surface of the wafer and the substrate, wherein the substrate is rigid, and wherein the gap providing step includes: providing compliant pads on the substrate so as to provide the gap between the face surface of the wafer and the substrate, wherein each of the compliant pads includes a peelable tacky surface to which the face surface of the wafer is releasably attached; 
 sealing each edge of the gap with a curable fluid encapsulant so that there is a void between the wafer and the substrate; 
 applying pressure to cause the encapsulant to flow between the wafer and the substrate; and 
 applying energy to cure the encapsulant. 
 
     
     
       19. A method of injecting an encapsulant between a front face surface of a semiconductor chip and a juxtaposed substrate, the front face surface of the chip having contacts, comprising:
 providing a gap between the front face surface of the chip and the substrate, wherein the substrate is rigid, includes a dielectric layer and has terminals and a bonding window, wherein at least some of the terminals overlie the chip front face surface, and the bonding window is aligned with at least some of the contacts;   electrically connecting the terminals to the contacts using a bonding tool inserted through the bonding window;   sealing each edge of the gap with a curable fluid encapsulant so that there is a void between the chip and the substrate;   applying pressure to cause the encapsulant to flow between the chip and the substrate;   applying energy to cure the encapsulant; and   applying solder balls to the terminals.   
     
     
       20. The method as claimed in claim 19, further comprising positioning a barrier adjacent a side of the substrate, the side facing away from the chip, wherein the barrier prevents the encapsulant from contaminating the terminals.  
     
     
       21. The method as claimed in claim 20, wherein the substrate is juxtaposed with a second front face surface of a second chip. 
     
     
       22. The method as claimed in claim 20, further comprising providing flexibilized epoxy between the chip and the substrate. 
     
     
       23. A method of injecting an encapsulant between a front face surface of a semiconductor chip and a juxtaposed substrate, the front face surface of the chip having contacts, comprising:
 providing a gap between the front face surface of the chip and the substrate, wherein the substrate is rigid and has terminals and a bonding window, wherein at least some of the terminals overlie the chip front face surface, and the bonding window is aligned with at least some of the contacts;   electrically connecting the terminals to the contacts using a bonding tool inserted through the bonding window;   sealing each edge of the gap with a curable fluid encapsulant so that there is a void between the chip and the substrate;   positioning a barrier in contact with a side of the substrate, the side facing away from the chip;   applying pressure to cause the encapsulant to flow between the chip and the substrate, wherein the barrier prevents the encapsulant from contaminating the terminals;   applying energy to cure the encapsulant; and   applying solder balls to the terminals.   
     
     
       24. A method of injecting an encapsulant between a front face surface of a semiconductor chip and a juxtaposed substrate, the front face surface of the chip having contacts, comprising:
 providing a gap between the front face surface of the chip and the substrate, wherein the substrate is rigid and has terminals and a bonding window, wherein at least some of the terminals overlie the chip front face surface, and the bonding window is aligned with at least some of the contacts;   electrically connecting the terminals to the contacts using a bonding tool inserted through the bonding window;   sealing each edge of the gap with a curable fluid encapsulant so that there is a void between the chip and the substrate;   applying pressure to cause the encapsulant to flow between the chip and the substrate, the encapsulant being bounded by a barrier adjacent a side of the substrate, the side facing away from the chip, wherein the barrier prevents the encapsulant from contaminating the terminals;   applying energy to cure the encapsulant; and   applying solder balls to the terminals.   
     
     
       25. The method as claimed in claim 24, wherein the bonding tool is a wirebonding tool. 
     
     
       26. The method as claimed in claim 25, wherein the wirebonding tool connects the terminals with the contacts using ultrasonic or thermosonic or thermocompression bonding. 
     
     
       27. A method of injecting an encapsulant between a front face surface of a semiconductor chip and a juxtaposed substrate, the front face surface of the chip having contacts, comprising:
 providing a gap between the front face surface of the chip and the substrate, wherein the substrate is rigid and has terminals and a bonding window, wherein at least some of the terminals overlie the chip front face surface, and the bonding window is aligned with at least some of the contacts;   electrically connecting the terminals to the contacts using a bonding tool inserted through the bonding window;   sealing each edge of the gap with a curable fluid encapsulant so that there is a void between the chip and the substrate;   applying pressure to cause the encapsulant to flow between the chip and the substrate, the encapsulant being bounded by a barrier in contact with a side of the substrate, the side facing away from the chip, wherein the barrier prevents the encapsulant from contaminating the terminals;   applying energy to cure the encapsulant; and   applying solder balls to the terminals.

Join the waitlist — get patent alerts

Track USRE43404E — get alerts on status changes and closely related new filings.

We store only your email — no account needed. See our privacy policy.