Semiconductor device with improved bond pads
Abstract
A semiconductor device with improved bond pads. The semiconductor device includes bond pads electrically connected to an active circuit in the device and openings formed in the bonding surface of the bond pads. The opening(s) may include recesses extending partially into the bonding surface or channels that extend entirely through the bond pads. Various shapes and configurations of the openings may be used, such as a pattern of channels radiating from the center of the bonding surface, a series of spaced apart rectangular channels arranged parallel to one another, an array of L shaped channels arranged around the center of the bonding surface, or an array of holes.
Claims
exact text as granted — not AI-modified1. A semiconductor device having an improved bond pad, the semiconductor device comprising:
a. a bond pad electrically connected to an active circuit in the semiconductor device; b. a substantially flat bonding surface on the bond pad; and c. an opening extending partially into the bonding surface.
2. A semiconductor device according to claim 1 , further comprising a plurality of openings in the bonding surface of the bond pad.
3. A semiconductor device according to claim 2 , wherein the openings are disposed about a center portion of the bonding surface of the bond pad so that the center portion of the bonding surface is free of openings.
4. A semiconductor device according to claim 4 , wherein the openings comprise A semiconductor device having an improved bond pad, the semiconductor device comprising:
a. a bond pad electrically connected to an active circuit in the semiconductor device;
b. a substantially flat bonding surface on the bond pad; and
c. a plurality of openings extending partially into the bonding surface and forming a pattern of radiating channels disposed about a center of the bonding surface.
5. A semiconductor device according to claim 2 , wherein the openings comprise a series of spaced apart rectangular channels arranged parallel to one another.
6. A semiconductor device according to claim 2 , wherein the openings comprise an array of L shaped channels disposed about a center of the bonding surface.
7. A semiconductor device according to claim 2 , wherein the openings comprise an array of holes disposed about the bonding surface.
8. A semiconductor device, which comprises:
a. an active circuit in the semiconductor device; b. a wiring pattern overlying and in electrical contact with the active circuit; c. bond pads formed as select areas on the wiring pattern; and d. a plurality of openings extending partially into a substantially flat bonding surface of the bond pads.
9. A semiconductor device according to claim 8 , wherein the openings are disposed about a center portion of the bonding surface of the bond pad so that the center portion of the bonding surface is free of openings.
10. A semiconductor device according to claim 8 , A semiconductor device, which comprises:
a. an active circuit in the semiconductor device;
b. a wiring pattern overlying and in electrical contact with the active circuit;
c. bond pads formed as select areas on the wiring pattern; and
d. a plurality of openings extending partially into a substantially flat bonding surface of the bond pads, wherein the openings comprise a pattern of radiating channels disposed about a center of the bonding surface.
11. A semiconductor device according to claim 8 , wherein the openings comprise a series of spaced apart rectangular channels arranged parallel to one another.
12. A semiconductor device according to claim 8 , wherein the openings comprise an array of L shaped channels disposed about a center of the bonding surface.
13. A semiconductor device according to claim 8 , wherein the openings comprise an array of holes disposed about the bonding surface.
14. A semiconductor device according to claim 8 , further comprising a passivation layer overlying the wiring pattern, the passivation layer having holes therethrough to expose the bonding surface of the bond pads to enable electrical connection to the bond pads through the holes.
15. A semiconductor device according to claim 8 , further comprising bond wires bonded to the bonding surface of the bond pads.
16. A semiconductor device, comprising:
a. a layer of insulating material; b. a substantially flat layer of conductive material overlying the layer of insulating material; c. bond pads formed as select areas on a surface of the layer of conductive material; and d. at least one opening extending partially into the bond pads.
17. An improved bond pad comprising:
a metal layer having a substantially planar surface, said metal layer electrically connected to an active circuit of a semiconductor device and having a plurality of openings extending partially into said metal layer, wherein the openings comprise a pattern of radiating channels disposed about a center of the bond pad.Join the waitlist — get patent alerts
Track USRE40819E — get alerts on status changes and closely related new filings.
We store only your email — no account needed. See our privacy policy.