Direct current sum bandgap voltage comparator

Abstract

A direct current sum bandgap voltage comparator for detecting voltage changes in a power supply. The direct current sum bandgap voltage comparator includes a summing node, current sources connected to the summing node and the power supply, and an indicator circuit connected to the summing node. Each current source supplies a current to the summing node wherein the summing node voltage level is responsive to the currents supplied. The indicator circuit is responsive to changes in the summing node voltage level and generates at an output a logical signal at one state when the summing node voltage level is greater than a predetermined value and generates the logical signal at the output at another state when the summing node voltage level is less than the predetermined value, the predetermined value corresponding to a preselected power supply voltage.

1. A direct current sum bandgap voltage comparator comprising:
 a summing node;  
 a plurality of current sources connected to the summing node, each current source further comprising at least one transistor, and each current source supplying a current to the summing node and being connected to a power supply voltage, wherein the currents sources supply currents according to a bandgap equation: 
   K 1 (V CC −V T )+K 1 V T =K 2 V BE +K 3 (kT/q)  
 
 
       where V CC  is the power supply voltage, V T  is a predetermined threshold voltage of a transistor in a first current source within the plurality of current sources, V BE  is a base emitter voltage of a transistor in a second current source within the plurality of current sources, k is Boltzman's constant, T is a temperature in kelvin of a transistor in a third current source within the plurality of current sources, q is an electronic charge constant, and K 1 , K 2 , and K 3  are constants determined by a resistance and a transistor length in the first, second, and third current sources, respectively; and
 an indicator circuit having an input connected to the summing node and generating a logical signal at an output, responsive to voltage changes in the summing node.  
 
     
     
       2. The direct current sum bandgap voltage comparator of  claim 1 , wherein the plurality of current sources are current mirrors. 
     
     
       3. A direct current sum bandgap voltage comparator comprising:
 a summing node;  
 a plurality of current sources connected to the summing node, each current source further comprising at least one transistor, and each current source supplying a current to the summing node and being connected to a power supply voltage; and  
 an indicator circuit having an input connected to the summing node and generating a logical signal at an output, responsive to voltage changes in the summing node, wherein the currents sources supply currents according to a bandgap equation: 
   K 1 (V CC −V T )+K 1 V T =K 2 V BE +K 3 (kT/q)  
 
 
       where V CC  is the power supply voltage, V T  is a predetermined threshold voltage of a transistor in a first current source within the plurality of current sources, V BE  is a base emitter voltage of a transistor in a second current source within the plurality of current sources, k is Boltzman's constant, T is a temperature in kelvin of a transistor in a third current source within the plurality of current sources, q is an electronic charge constant, and K 1 , K 2 , and K 3  are constants determined by a resistance and a transistor length in the first, second, and third current sources, respectively, and wherein the plurality of current sources comprises four current mirrors. 
     
     
       4. The direct current sum bandgap voltage comparator of  claim 3 , wherein the first current mirror includes a plurality of transistors and supplies a current to the summing node defined by K 1 (V CC −V T ). 
     
     
       5. The direct current sum bandgap voltage comparator of  claim 4 , wherein the second current mirror includes a plurality of transistors and supplies a current to the summing node defined by K 1 V T . 
     
     
       6. The direct current sum bandgap voltage comparator of  claim 5 , wherein the third current mirror includes a plurality of transistors and supplies a current to the summing node defined by K 2 V BE . 
     
     
       7. The direct current sum bandgap voltage comparator of  claim 6 , wherein the fourth current mirror supplies a current to the summing node defined by K 3 (kT/q). 
     
     
       8. The direct current sum bandgap voltage comparator of  claim 7  further comprising a clamping circuit connected to the summing node, wherein a voltage swing for the summing node, responsive to changes in current supplied by the current mirrors, may be set between predetermined voltages. 
     
     
       9. The direct current sum bandgap voltage comparator of  claim 7  further comprising a cascode stage having at least a first and second connections, the first connection is connected to the summing node and the second connection is connected to one of the four current mirrors. 
     
     
       10. The direct current sum bandgap voltage comparator of  claim 7  further comprising a hysteresis circuit connected to the indicator circuit to reduce noise. 
     
     
       11. The direct current sum bandgap voltage comparator of  claim 7 , wherein the indicator circuit includes a pair of inverters connected in series, wherein an input in the first inverter is the input of the indicator circuit connected to the summing node and an output of the second inverter is the output of the indicator circuit. 
     
     
       12. The direct current sum bandgap voltage comparator of  claim 11 , wherein the indicator circuit provides a logic one output if the power supply is equal to or greater than a preselected voltage. 
     
     
       13. A zero power circuit comprising:
 a first circuit;  
 a direct current sum bandgap voltage comparator comprising: 
 a summing node;  
 a plurality of current sources connected to the summing node, each current source further comprising at least one transistor, and each current source supplying a current to the summing node and being connected to a power supply voltage, wherein the current sources supply according to a bandgap equation: 
   K 1 (V CC −V T )+K 1 V T =K 2 V BE +K 3 (kT/q)  
 
 
 
       where V CC  is the power supply voltage, V T  is a predetermined threshold voltage of a transistor in a first current source within the plurality of current sources, V BE  is a base emitter voltage of a transistor in a second current source within the plurality of current sources, k is Boltzman's constant, T is a temperature in kelvin of a transistor in a third current source within the plurality of current sources, q is an electronic charge constant, and K 1 , K 2 , and K 3  are constants determined by a resistance and a transistor length in the first, second, and third current sources, respectively;
   an indicator circuit having an input connected to the summing node and generating a logical signal at an output, responsive to changes in the summing node; and    
 a switching circuit for providing power to the first circuit from a primary power supply and a secondary power supply, the switching circuit being connected to the output of the indicator circuit, wherein power from the primary power supply is supplied to the first circuit if the logical signal indicates that the power supply voltage is equal to or greater than the predetermined threshold voltage and power from the secondary power supply is supplied to the first circuit if the power supply voltage is less than the predetermined threshold voltage.  
 
     
     
       14. A zero power circuit comprising:
 a first circuit;  
 a direct current sum bandgap voltage comparator comprising: 
 a summing node;  
 a plurality of current sources connected to the summing node, each current source further comprising at least one transistor, and each current source supplying a current to the summing node and being connected to a power supply voltage;  
 an indicator circuit having an input connected to the summing node and generating a logical signal at an output, responsive to changes in the summing node; and  
 
 a switching circuit for providing power to the first circuit from a primary power supply and a secondary power supply, the switching circuit being connected to the output of the indicator circuit, wherein power from the primary power supply is supplied to the first circuit if the logical signal indicates that the power supply voltage is equal to or greater than the preselected voltage and power from the secondary power supply is supplied to the first circuit if the power supply voltage is less than the preselected voltage, wherein the current sources supply according to a bandgap equation: 
   K 1 (V CC −V T )+K 1 V T =K 2 V BE +K 3 (kT/q)  
 
 
       where V CC  is the power supply voltage, V T  is a predetermined threshold voltage of a transistor in a first current source within the plurality of current sources, V BE  is a base emitter voltage of a transistor in a second current source within the plurality of current sources, k is Boltzman's constant, T is a temperature in kelvin of a transistor in a third current source within the plurality of current sources, q is an electronic charge constant, and K 1 , K 2 , and K 3  are constants determined by a resistance and a transistor length in the first, second, and third current sources, respectively, and wherein the plurality of current sources comprises four current mirrors. 
     
     
       15. The zero power circuit of  claim 14 , wherein the secondary power supply is a battery. 
     
     
       16. The zero power circuit of  claim 14 , wherein the first current mirror includes a plurality of transistors and supplies a current to the summing node defined by K 1 (V CC −V T ). 
     
     
       17. The zero power circuit of  claim 14 , wherein the second current mirror includes a plurality of transistors and supplies a current to the summing node defined by K 1 V T . 
     
     
       18. The zero power circuit of  claim 17 , wherein the third current mirror includes a plurality of transistors and supplies a current to the summing node defined by K 2 V BE . 
     
     
       19. The zero power circuit of  claim 18 , wherein the fourth current mirror supplies a current to the summing node defined by K 3 (kT/q). 
     
     
       20. The zero power circuit of  claim 19  further comprising a clamping circuit connected to the summing node, wherein a voltage swing for the summing node, responsive to changes in current supplied by the current mirrors, may be set between selected voltages. 
     
     
       21. The zero power circuit of  claim 19  further comprising a cascode stage located between the summing node and the current mirrors. 
     
     
       22. The zero power circuit of  claim 19  further comprising a hysteresis circuit connected to the indicator circuit to reduce noise. 
     
     
       23. The direct current sum bandgap voltage comparator of  claim 19 , wherein the indicator circuit provides a logic one output if the power supply is equal to or greater than a preselected voltage. 
     
     
       24. A method, comprising:
   generating a first current that changes with temperature according to a first polarity;        generating a second current that changes with temperature according to a second polarity;        combining the first and second currents to generate a reference current; and        comparing the reference current to a third current that is dependent on a power - supply voltage.     
     
     
       25. The method of  claim 24  wherein:
   the first current changes with temperature according to a positive polarity; and        the second current changes with temperature according to a negative polarity.     
     
     
       26. The method of  claim 24  wherein:
   the first current is proportional to temperature; and        the second current is inversely proportional to temperature.     
     
     
       27. The method of  claim 24  wherein:
   the first current increases as temperature increases and decreases as temperature decreases; and        the second current decreases as temperature increases and increases as temperature decreases.     
     
     
       28. The method of  claim 24  wherein combining the first and second currents comprises summing the first and second currents. 
     
     
       29. The method of  claim 24  wherein combining the first and second currents comprises sinking the first and second currents from a node. 
     
     
       30. The method of  claim 24  wherein combining the first and second currents comprises sourcing the first and second currents to a node. 
     
     
       31. The method of  claim 24  wherein comparing the reference current comprises summing the reference current and the third current at a node. 
     
     
       32. The method of  claim 24  wherein comparing the reference current comprises:
   sinking the reference current from a node; and        sourcing the third current to the node.     
     
     
       33. A method, comprising:
   generating a first current that increases as temperature increases and that decreases as temperature decreases;        generating a second current that decreases as temperature increases and that increases as temperature decreases;        generating a third current that is dependent on a first voltage; and        combining the first, second, and third currents at a node to generate a second voltage on the node.     
     
     
       34. The method of  claim 33  wherein combining the currents comprises:
   sinking the first and second currents from the node; and        sourcing the third current to the node.     
     
     
       35. The method of  claim 33  wherein:
   the first current is related to a thermal voltage; and        the second current is related to a voltage across a forward - biased p - n junction.     
     
     
       36. The method of  claim 33  wherein:
   the first current is related to a thermal voltage; and        the second current is related to a base - emitter voltage of a bipolar transistor.     
     
     
       37. The method of  claim 33  wherein the second current is related to the natural logarithm of a current through a bipolar transistor. 
     
     
       38. A method, comprising:
   generating a first current that is related to temperature according to a first polarity;        generating a second current that is related to temperature according to a second polarity;        combining the first and second currents into a reference current;        generating a third current that is dependent on a first voltage; and        comparing the third current to the reference current.     
     
     
       39. The method of  claim 38  wherein:
   the first current is related to a thermal voltage;        the second current is related to a voltage across a forward - biased p - n junction; and        the third current is dependent on a power - supply voltage.     
     
     
       40. The method of  claim 38  wherein:
   combining the first and second currents comprises sinking the first and second currents from a node; and        comparing the third current to the reference current comprises,      sourcing the third current to the node, and        comparing a second voltage on the node to a reference voltage.       
     
     
       41. A method, comprising:
   generating a first current that is proportional to a threshold voltage of a field - effect transistor;        generating a second current that is proportional to a difference between a supply voltage and a threshold voltage of a second field - effect transistor;        generating a third current that is proportional to a base - emitter voltage of a first bipolar transistor;        generating a fourth current that is proportional to absolute temperature; and        driving a node with the first, second, third, and fourth currents.     
     
     
       42. The method of  claim 41  wherein driving the node comprises:
   sourcing the first and second currents to the node; and        sinking the third and fourth currents from the node.     
     
     
       43. The method of  claim 41 , further comprising comparing a voltage on the node with a reference voltage. 
     
     
       44. The method of  claim 41  wherein the first field- effect transistor is matched to the second field - effect transistor.   
     
     
       45. The method of  claim 41  wherein the threshold voltage of the first field- effect transistor is equal or approximately equal to the threshold voltage of the second field - effect transistor.   
     
     
       46. A method, comprising:
   generating a first current that equals a product of a first constant and a threshold voltage of a first field - effect transistor;        generating a second current that equals a product of a second constant and a difference between a supply voltage and a threshold voltage of a second field - effect transistor;        generating a third current that equals a product of a third constant and a base - emitter voltage of a bipolar transistor;        generating a fourth current that equals a product of a fourth constant and a thermal voltage; and        driving a node with the first, second, third, and fourth currents.     
     
     
       47. The method of  claim 46  wherein the first constant equals the second constant. 
     
     
       48. The method of  claim 46  wherein driving the node comprises:
   sourcing the first and second currents to the node; and        sinking the third and fourth currents from the node.     
     
     
       49. A method, comprising:
   generating a first current that changes with temperature according to a first polarity;        generating a second current that changes with temperature according to a second polarity;        combining the first and second currents to generate a reference current; and        comparing the reference current to a third current that is proportional to a power - supply voltage.     
     
     
       50. A method, comprising:
   generating with a first current source that is powered by a supply voltage a reference current that has a temperature coefficient and that is independent of the supply voltage;        providing the reference current at a node;        generating with a second current source that is powered by the supply voltage a supply - related current having approximately the temperature coefficient and being related to the supply voltage;        providing the supply - related current at the node; and        comparing the reference current to the supply - related current at the node.     
     
     
       51. The method of  claim 50  wherein:
   providing the reference current at the node comprises sinking the reference current from the node; and        providing the supply - related current at the node comprises sourcing the supply - related current to the node.     
     
     
       52. The method of  claim 50  wherein comparing the reference current comprises summing the reference current and the supply- related current at the node to generate a voltage.   
     
     
       53. A method, comprising:
   generating a reference current having a first temperature coefficient;        comparing the reference current to a supply - related current that is related to a power - supply voltage and that has or has approximately the first temperature coefficient;        wherein comparing the reference current comprises summing the reference current and the supply - related current at a node to generate a voltage;        connecting the power - supply voltage to a load if the voltage is greater than a predetermined level; and        connecting a secondary supply to the load if the voltage is less than the predetermined level.     
     
     
       54. A method, comprising:
   generating a first current that is related to temperature according to a first polarity;        generating a second current that is related to temperature according to a second polarity;        combining the first and second currents into a reference current;        generating a third current that is related to temperature according to the first polarity;        generating a fourth current that is related to a supply voltage and that is related to temperature according to the second polarity;        combining the third and fourth currents into a supply - related current; and        comparing the reference current to the supply - related current.     
     
     
       55. The method of  claim 54  wherein the fourth current is proportional to the supply voltage. 
     
     
       56. The method of  claim 54  wherein the supply- related current is proportional to the supply voltage.   
     
     
       57. The method of  claim 54  wherein:
   the first and third currents are inversely proportional to temperature; and        the second and fourth currents are proportional to temperature.     
     
     
       58. A method, comprising:
   generating with a first current source that is powered by a supply voltage a reference current that has a temperature coefficient and that is independent of the supply voltage;        providing the reference current at a node;        generating with a second current source that is powered by the supply voltage a supply - related current having approximately the temperature coefficient and being related to the supply voltage;        providing the supply - related current at the node; and        neither sourcing to nor sinking from the node a current other than the reference and supply - related currents.     
     
     
       59. The method of  claim 58  wherein:
   providing the reference current at the node comprises sinking the reference current from the node; and        providing the supply - related current at the node comprises sourcing the supply - related current to the node.     
     
     
       60. A method comprising:
   generating with a first current source that is powered by a supply voltage a reference current that has a temperature coefficient and that is independent of the supply voltage;        providing the reference current at a comparison node;        generating with a second current source that is powered by the supply voltage a supply - related current having approximately the temperature coefficient and being related to the supply voltage;        providing the supply - related current at the comparison node; and        comparing a voltage on the comparison node to a reference voltage.     
     
     
       61. The method of  claim 60  wherein:
   providing the reference current at the comparison node comprises sinking the reference current from the comparison node; and        providing the supply - related current at the comparison node comprises sourcing the supply - related current to the comparison node.