Adjust bit determining circuit

Abstract

A recording medium for a computer contains sectors, each of which represents a section of data that has originally been supplied by a user. As the user data is sent to the recording medium from the memory of the computer, an adjust bit determining circuit determines the adjust bit for a block of the write data. The adjust bit-value is such that the sum of the DC levels for the write data at a given point is equal to zero or approaches zero. The user data is converted using RLL( 1,7 ) codes and PWM is performed to derive the write data. The circuit includes an encoder for receiving the user data two bits at a time. The encoder outputs DSV values for the 2-bit user data. A first circuit group for accumulating the DSV values from the encoder is used acquire block DSV values of data belonging to the plurality of blocks of the data section. A second circuit group accumulates these block DSV values computed by the first circuit group and calculates a temporary sector DSV value. This temporary sector DSV value represents a DSV value ranging from the head block of the data section up to the current block which is being processed. The first and second circuit groups are controlled by a DSV sequencer. A determining circuit is coupled to the first and second circuit group for comparing the sector DSV value with a block DSV value for a next block following the current block.

1. A method of determining an adjust bit value for a block of write data included in a data section on a recording medium, said data action including a plurality of blocks, said write-data being derived from received user data, said method comprising the steps of:
 performing code conversion on said user data;  
 performing pulse width modulation on said converted user data in order to derive said write data; and  
 determining said adjust bit value based on an analysis of blocks DSV values and sector DSV values of said write data in such a manner that a sum of DC levels of said write data approaches zero,  
 said adjust bit determining step including the steps of: 
 A) continuously computing block DSV values block by block for said write data belonging to said plurality of blocks of said data section,  
 B) accumulating said computed block DSV values to acquire a temporary sector DSV value for write data ranging from a head block to a current block in said data section, and  
 
 C) comparing said temporary sector DSV value with a next block DSV value of a next block adjacent to said current block, whereby an adjust bit value for said next block is determined in such a manner that a new sector DSV value obtained by adding said temporary sector DSV value to said next block DSV value approaches to zero.  
 
     
     
       2. The method according to  claim 1 , wherein DSV values are acquired from said user data two bits at a time by referring to a predetermined conversion table, and DSV values of said 2-bit data are sequentially accumulated to acquire said block DSV values. 
     
     
       3. The method according to  claim 2 , wherein said conversion table includes a first conversion table for converting said user data to RLL ( 1 ,  7 ) codes two bits at a time, and a converted-value table indicating a relation between said converted user data and DSV values. 
     
     
       4. The method according to  claim 2 , wherein predetermined DSV values are prepared for pattern data other than said user data, are recorded in said data section, and are used for computing a block DSV value. 
     
     
       5. An adjust-bit determining circuit for determining an adjust bit value for a block of write data included in a data section on a recording medium, said data section including a plurality of blocks, said write data being derived from received user data, said circuit comprising:
 an encoder for receiving user data two bits at a time and outputting DSV values for said 2-bit user data; a control circuit;  
 a first circuit group for accumulating said DSV values from said encoder to acquire block DSV values block by block of data belonging to said plurality of blocks of said data section under control of said control circuit;  
 a second circuit group for accumulating said block DSV values computed by said first circuit group in order to acquire a temporary sector DSV value ranging from a head block to a current block in said data section, said second circuit group under control of said control circuit; and  
 a determining circuit, coupled to said first and second circuit groups, for comparing said temporary sector DSV value computed by said second circuit group with a next block DSV value of a next block adjacent to said current block, said next block DSV value computed by said first circuit group, whereby said determining circuit determines an adjust bit value for said next block in such a manner that a new sector DSV value obtained by adding said temporary sector DSV value to said next block DSV value approaches zero.  
 
     
     
       6. The adjust-bit determining circuit according to  claim 5 , wherein said encoder includes a conversion table for converting said user data to RLL ( 1 ,  7 ) codes two bits at a time, and a converted-value table indicating a relation between said converted user data and DSV values. 
     
     
       7. The adjust-bit determining circuit according to  claim 5 , wherein said control circuit includes a DSV sequencer. 
     
     
       8. The adjust-bit determining circuit according to  claim 5 , wherein said first circuit group includes:
 an added-value selector coupled to said encoder;  
 an adder coupled to said added-value selector; and  
 a block DSV register provided between said adder and said determining circuit.  
 
     
     
       9. The adjust-bit determining circuit according to  claim 5 , wherein said second circuit group includes:
 an added-value selector coupled to said encoder;  
 an adder coupled to said added-value selector;  
 a block DSV register provided between said adder and said determining circuit; and  
 a sector DSV register provided in parallel with said block DSV register between said adder and said determining circuit.  
 
     
     
       10. A write-data producing circuit for receiving user data from a memory of a computer and producing write data to be written to said recording medium, said write-data producing circuit comprising:
 an adjust-bit determining circuit for determining an adjust bit for write data as recited in  claim 5 , said adjust bit determining circuit coupled to said memory;  
 a delay buffer coupled to said memory; and  
 a write-data preparing circuit, coupled to said delay buffer and said adjust bit determining circuit, for outputting said write data.  
 
     
     
       11. A disk apparatus for receiving said user data and writing said write data to an optical disk, said disk apparatus comprising:
 a write data producing circuit as recited in  claim 10 ;  
 a signal processor coupled to said write data producing circuit; and  
 a recording head coupled to said signal processor for recording said write data on said optical disk.  
 
     
     
       12. A method of determining an adjust bit value for a block of write data included in a data section of a recording medium, the data section including a plurality of blocks, wherein the write data is derived from user data, the method comprising:
   performing code conversion on the user data to derive the write data; and        determining the adjust bit value in such a manner that a sum of DC levels of the write data approaches zero, and determining DSV values using the user data on which the code conversion is not performed.     
     
     
       13. An adjust bit determining circuit for determining an adjust bit value for a block of write data included in a data section of a recording medium, the data section including a plurality of blocks, wherein the write data is derived via code conversion on the user data, and the adjust bit value is determined such that a sum of DC levels of the write data approaches zero, the circuit comprising:
   an encoder for receiving the user data on which the code conversion is not performed and outputting DSV values for the user data.