USRE37751EExpiredUtility

Apparatus and method for transient suppression in synchronous data detection systems

Assignee: MARVELL INT LTDPriority: Apr 28, 1997Filed: Oct 25, 2000Granted: Jun 18, 2002
Est. expiryApr 28, 2017(expired)· nominal 20-yr term from priority
Inventors:Pantas Sutardja
G11B 20/10009G11B 20/10055G11B 20/1403
67
PatentIndex Score
6
Cited by
6
References
72
Claims

Abstract

Disclosed is a method for transient suppression in synchronous data protection systems which includes high-pass filtering of the signal produced by the sampling and shaping circuits before the signal enters the timing and gain control circuits. This high-pass filtering may be turned on when a transient is detected, in anticipation of a previously detected transient, or may be always on. Using the high-pass version of the shaped signal allows the timing loop and the gain loop to function during a transient interval, thus maintaining timing and gain lock during such an interval.

Claims

exact text as granted — not AI-modified
What is claimed is:  
     
       1. An apparatus for suppression of transients in a synchronous data detection system comprising: 
       an analog front-end circuit receiving an analog signal and outputting an amplified signal;  
       a sampler receiving the amplified signal and outputting a sampled signal;  
       a shaping circuit receiving the sampled signal and outputting a shaped signal;  
       a data detector receiving the shaped signal and detecting data in the shaped signal;  
       a first high-pass filter receiving the shaped signal and outputting a high-pass signal;  
       a gain control circuit receiving the high-pass signal and controlling the analog front-end circuit using the high-pass signal; and  
       a timing control circuit receiving the high-pass signal and controlling the sampler and the shaping circuit using the high-pass signal.  
     
     
       2. The apparatus in  claim 1 , wherein the first high-pass filter is bypassable. 
     
     
       3. The apparatus in  claim 2 , further comprising  An apparatus for suppression of transients in a synchronous data detection system comprising: 
         an analog front - end circuit receiving an analog signal and outputting an amplified signal;    
       
         a sampler receiving the amplified signal and outputting a sampled signal;  
       
       
         a shaping circuit receiving the sampled signal and outputting a shaped signal;  
       
       
         a data detector receiving the shaped signal and detecting data in the shaped signal;  
       
         a first high - pass filter receiving the shaped signal and outputting a high - pass signal, wherein the first high - pass filter is bypassable;    
         a gain control circuit receiving the high - pass signal and controlling the analog front - end circuit using the high - pass signal;    
         a timing control circuit receiving the high - pass signal and controlling the sampler and the shaping circuit using the high - pass signal; and   
       a transient detector receiving the sampled signal and using the sampled signal to control bypassing of the first high-pass filter.  
     
     
       4. The apparatus in  claim 3 , wherein the first high-pass filter is switched on when a transient is detected by the transient detector. 
     
     
       5. The apparatus in  claim 3 , wherein the first high-pass filter is switched on in anticipation of a transient that was previously detected by the transient detector. 
     
     
       6. The apparatus in  claim 1 , wherein the analog front-end circuit comprises a variable gain amplifier (VGA). 
     
     
       7. The apparatus in  claim 6 , wherein the analog front-end further comprises a second high-pass filter. 
     
     
       8. The apparatus in  claim 7 , wherein the second high-pass filter is bypassable. 
     
     
       9. The apparatus in  claim 1 , wherein the sampler comprises an analog-to-digital converter. 
     
     
       10. The apparatus in  claim 1 , wherein the sampler comprises a sample-and-hold circuit. 
     
     
       11. The apparatus in  claim 1 , wherein the shaping circuit comprises a finite impulse response (FIR) filter. 
     
     
       12. The apparatus in  claim 1 , wherein the data detector comprises a maximum-likelihood sequence detector. 
     
     
       13. The apparatus in  claim 1 , further comprising a voltage controlled oscillator (VCO) receiving a voltage input from the timing control circuit and outputting an oscillating signal to the sampler and the shaping circuit. 
     
     
       14. A method for robust data detection in a synchronous data detection system comprising: 
       receiving a signal including a transient in a baseline of the signal;  
       amplifying the signal under control of a gain control signal to form an amplified signal;  
       sampling the amplified signal under control of a timing control signal to form a sampled signal;  
       shaping the sampled signal under control of the timing control signal to form a shaped signal;  
       recovering data from the shaped signal;  
       high-pass filtering the shaped signal to form a high-pass version of the shaped signal;  
       generating the gain control signal using the high-pass version of the shaped signal; and  
       generating the timing control signal using the high-pass version of the shaped signal.  
     
     
       15. An apparatus for suppression of transients in a synchronous data detection system comprising: 
         an analog front - end circuit receiving an analog signal and outputting an amplified signal;    
       
         a sampler receiving the amplified signal and outputting a sampled signal;  
       
       
         a data detector responsive to the sampled signal to detect data therein;  
       
         a first high - pass filter responsive to the sampled signal and outputting a high - pass signal;    
         a gain control circuit receiving the high - pass signal and controlling the analog front - end circuit using the high - pass signal; and    
         a timing control circuit receiving the high - pass signal and controlling the sampler in accordance with the high - pass signal.   
     
     
       16. The apparatus in  claim 15 , wherein the first high- pass filter is bypassable.   
     
     
       17. The apparatus in  claim 15 , wherein the analog front- end circuit comprises a variable gain amplifier  ( VGA ) .   
     
     
       18. The apparatus in  claim 17 , wherein the analog front- end further comprises a second high - pass filter.   
     
     
       19. The apparatus in  claim 18 , wherein the second high- pass filter is bypassable.   
     
     
       20. The apparatus in  claim 15 , wherein the sampler comprises an analog- to - digital converter.   
     
     
       21. The apparatus in  claim 15 , wherein the sampler comprises a sample- and - hold circuit.   
     
     
       22. The apparatus in  claim 15 , wherein the data detector comprises a maximum- likelihood sequence detector.   
     
     
       23. The apparatus in  claim 15 , further comprising a voltage controlled oscillator ( VCO )  receiving a voltage input from the timing control circuit and outputting an oscillating signal to the sampler.   
     
     
       24. An apparatus for suppression of transients in a synchronous data detection system comprising: 
         an analog front - end circuit receiving an analog signal and outputting an amplified signal;    
       
         a sampler receiving the amplified signal and outputting a sampled signal;  
       
       
         a data detector responsive to the sampled signal to detect data therein;  
       
         a first high - pass filter responsive to the sampled signal and outputting a high - pass signal, wherein the first high - pass filter is bypassable;    
         a gain control circuit receiving the high - pass signal and controlling the analog front - end circuit using the high - pass signal;    
         a timing control circuit receiving the high - pass signal and controlling the sampler in accordance with the high - pass signal; and    
         a transient detector responsive to the sampled signal to control bypassing of the first high - pass filter.   
     
     
       25. The apparatus in  claim 24 , wherein the first high- pass filter is switched on when a transient is detected by the transient detector.   
     
     
       26. The apparatus in  claim 24 , wherein the transient detector controls said analog front end circuit. 
     
     
       27. The apparatus in  claim 24 , wherein the first high- pass filter is switched on in anticipation of a transient that was previously detected by the transient detector.   
     
     
       28. A method for data detection in a synchronous data detection system comprising: 
       
         a. receiving a signal including a transient component;  
       
       
         b. amplifying the signal under control of a gain control signal to form an amplified signal;  
       
       
         c. sampling the amplified signal under control of a timing control signal to form a sampled signal;  
       
       
         d. recovering data from the sampled signal;  
       
         e. high - pass filtering the sampled signal to form a high - pass version of the sampled signal;    
         f. generating the gain control signal using the high - pass version of the sampled signal; and    
         g. generating the timing control signal using the high - pass version of the sampled signal.   
     
     
       29. The method of  claim 28  further comprising the step of: 
         ff. high - pass filtering the amplified signal.   
     
     
       30. The method of  claim 29 , further comprising the step of: 
       
         gg. bypassing step ff. 
       
     
     
       31. A method for data detection in a synchronous data detection system comprising: 
       
         a. receiving a signal including a transient component;  
       
       
         b. amplifying the signal under control of a gain control signal to form an amplified signal;  
       
       
         c. sampling the amplified signal under control of a timing control signal to form a sampled signal;  
       
       
         d. recovering data from the sampled signal;  
       
         e. high - pass filtering the sampled signal to form a high - pass version of the sampled signal;    
         f. generating the gain control signal using the high - pass version of the sampled signal;    
         g. generating the timing control signal using the high - pass version of the sampled signal; and    
       
         h. detecting a transient in step c; and  
       
       
         i. bypassing step e in response to step h. 
       
     
     
       32. The method of  claim 31 , wherein step i further comprises bypassing step e when a transient is detected in step h. 
     
     
       33. The method of  claim 32 , wherein step i further comprises bypassing step e when a transient is anticipated that was previously detected in step h. 
     
     
       34. An apparatus for suppression of transients in a synchronous data detection system comprising: 
         an analog front - end circuit receiving an analog signal and outputting an amplified signal;    
       
         a sampler receiving the amplified signal and outputting a sampled signal;  
       
       
         a shaping circuit receiving the sampled signal and outputting a shaped signal;  
       
       
         a data detector receiving the shaped signal to detecting data therein;  
       
         a first high - pass filter receiving the shaped signal and outputting a high - pass signal; and    
         a timing control circuit receiving the high - pass signal and controlling the sampler and the shaping circuit using the high - pass signal.   
     
     
       35. The apparatus in  claim 34 , wherein the first high- pass filter is bypassable.   
     
     
       36. The apparatus in  claim 34 , wherein the analog front- end circuit comprises a variable gain amplifier  ( VGA ) .   
     
     
       37. The apparatus in  claim 36 , wherein the analog front- end further comprises a second high - pass filter.   
     
     
       38. The apparatus in  claim 37 , wherein the second high- pass filter is bypassable.   
     
     
       39. The apparatus in  claim 34 , wherein the sampler comprises an analog- to - digital converter.   
     
     
       40. The apparatus in  claim 34 , wherein the sampler comprises a sample- and - hold circuit.   
     
     
       41. The apparatus in  claim 34 , wherein the data detector comprises a maximum- likelihood sequence detector.   
     
     
       42. The apparatus in  claim 34 , further comprising a voltage controlled oscillator ( VCO )  receiving a voltage input from the timing control circuit and outputting an oscillating signal to the sampler.   
     
     
       43. The apparatus in  claim 34 , wherein the shaping circuit comprises a finite impulse response ( FIR )  filter.   
     
     
       44. An apparatus for suppression of transients in a synchronous data detection system comprising: 
         an analog front - end circuit receiving an analog signal and outputting an amplified signal;    
       
         a sampler receiving the amplified signal and outputting a sampled signal;  
       
       
         a shaping circuit receiving the sampled signal and outputting a shaped signal;  
       
       
         a data detector receiving the shaped signal to detecting data therein;  
       
         a first high - pass filter receiving the shaped signal and outputting a high - pass signal, wherein the first high - pass filter is bypassable;    
         a timing control circuit receiving the high - pass signal and controlling the sampler and the shaping circuit using the high - pass signal; and    
         a transient detector responsive to the sampled signal to control bypassing of the first high - pass filter.   
     
     
       45. The apparatus in  claim 44 , wherein the first high- pass filter is switched on when a transient is detected by the transient detector.   
     
     
       46. The apparatus in  claim 44 , wherein the transient detector controls said analog front end circuit. 
     
     
       47. The apparatus in  claim 44 , wherein the first high- pass filter is switched on in anticipation of a transient that was previously detected by the transient detector.   
     
     
       48. A method for data detection in a synchronous data detection system comprising: 
       
         a. receiving a signal including a transient component;  
       
       
         b. amplifying the signal under control of a gain control signal to form an amplified signal;  
       
       
         c. sampling the amplified signal under control of a timing control signal to form a sampled signal;  
       
       
         d. shaping the sampled signal under control of the timing control signal to form a shaped signal;  
       
       
         e. recovering data from the shaped signal;  
       
         f. high - pass filtering the shaped signal to form a high - pass version of the shaped signal; and    
         g. generating the timing control signal using the high - pass version of the shaped signal.   
     
     
       49. The method of  claim 48 , further comprising the step of: 
         yy. high - pass filtering the amplified signal.   
     
     
       50. The method of  claim 49 , further comprising the step of: 
       
         zz. bypassing step yy. 
       
     
     
       51. A method for data detection in a synchronous data detection system comprising: 
       
         a. receiving a signal including a transient component;  
       
       
         b. amplifying the signal under control of a gain control signal to form an amplified signal;  
       
       
         c. sampling the amplified signal under control of a timing control signal to form a sampled signal;  
       
       
         d. shaping the sampled signal under control of the timing control signal to form a shaped signal;  
       
       
         e. recovering data from the shaped signal;  
       
         f. high - pass filtering the shaped signal to form a high - pass version of the shaped signal;    
         g. generating the timing control signal using the high - pass version of the shaped signal;    
       
         h. detecting a transient in step c; and  
       
       
         i. bypassing step f in response to step h. 
       
     
     
       52. The method of  claim 51 , wherein step i further comprises bypassing step e when a transient is detected in step h. 
     
     
       53. The method of  claim 51 , wherein step i further comprises bypassing step e when a transient is anticipated that was previously detected in step h. 
     
     
       54. An apparatus for suppression of transients in a synchronous data detection system comprising: 
         an analog front - end circuit receiving an analog signal and outputting an amplified signal;    
       
         a sampler receiving the amplified signal and outputting a sampled signal;  
       
       
         a shaping circuit receiving the sampled signal and outputting a shaped signal;  
       
       
         a data detector receiving the shaped signal and detecting data in the shaped signal;  
       
         a first high - pass filter receiving the shaped signal and outputting a high - pass signal; and    
         a gain control circuit receiving the high - pass signal and controlling the analog front - end circuit using the high - pass signal.   
     
     
       55. The apparatus in  claim 54 , wherein the first high- pass filter is bypassable.   
     
     
       56. The apparatus in  claim 54 , wherein the analog front- end circuit comprises a variable gain amplifier  ( VGA ) .   
     
     
       57. The apparatus in  claim 56 , wherein the analog front- end further comprises a second high - pass filter.   
     
     
       58. The apparatus in  claim 57 , wherein the second high- pass filter is bypassable.   
     
     
       59. The apparatus in  claim 54 , wherein the sampler comprises an analog- to - digital converter.   
     
     
       60. The apparatus in  claim 54 , wherein the sampler comprises a sample- and - hold circuit.   
     
     
       61. The apparatus in  claim 54 , wherein the data detector comprises a maximum- likelihood sequence detector.   
     
     
       62. The apparatus in  claim 54 , wherein the shaping circuit comprises a finite impulse response ( FIR )  filter.   
     
     
       63. An apparatus for suppression of transients in a synchronous data detection system comprising: 
         an analog front - end circuit receiving an analog signal and outputting an amplified signal;    
       
         a sampler receiving the amplified signal and outputting a sampled signal;  
       
       
         a shaping circuit receiving the sampled signal and outputting a shaped signal;  
       
       
         a data detector receiving the shaped signal and detecting data in the shaped signal;  
       
         a first high - pass filter receiving the shaped signal and outputting a high - pass signal, wherein the first high - pass filter is bypassable;    
         a gain control circuit receiving the high - pass signal and controlling the analog front - end circuit using the high - pass signal; and    
         a transient detector responsive to the sampled signal to control bypassing of the first high - pass filter.   
     
     
       64. The apparatus in  claim 63 , wherein the first high- pass filter is switched on when a transient is detected by the transient detector.   
     
     
       65. The apparatus in  claim 63 , wherein the first high- pass filter is switched on in anticipation of a transient that was previously detected by the transient detector.   
     
     
       66. The apparatus in  claim 63 , wherein the transient detector controls said analog front end circuit. 
     
     
       67. A method for data detection in a synchronous data detection system comprising: 
       
         a. receiving a signal including a transient component;  
       
       
         b. amplifying the signal under control of a gain control signal to form an amplified signal;  
       
       
         c. sampling the amplified signal under control of a timing control signal to form a sampled signal;  
       
       
         d. shaping the sampled signal under control of the timing control signal to form a shaped signal;  
       
       
         e. recovering data from the shaped signal;  
       
         f. high - pass filtering the shaped signal to form a high - pass version of the shaped signal; and    
         g. generating the gain control signal using the high - pass version of the shaped signal.   
     
     
       68. The method of  claim 67 , further comprising the step of: 
         j. high - pass filtering the amplified signal.   
     
     
       69. The method of  claim 68 , further comprising the step of: 
       
         k. bypassing step j. 
       
     
     
       70. A method for data detection in a synchronous data detection system comprising: 
       
         a. receiving a signal including a transient component;  
       
       
         b. amplifying the signal under control of a gain control signal to form an amplified signal;  
       
       
         c. sampling the amplified signal under control of a timing control signal to form a sampled signal;  
       
       
         d. shaping the sampled signal under control of the timing control signal to form a shaped signal;  
       
       
         e. recovering data from the shaped signal;  
       
         f. high - pass filtering the shaped signal to form a high - pass version of the shaped signal;    
         g. generating the gain control signal using the high - pass version of the shaped signal;    
       
         h. detecting a transient in step c; and  
       
       
         i. bypassing step f in response to step h. 
       
     
     
       71. The method of  claim 70 , wherein step i further comprises bypassing step e when a transient is detected in step h. 
     
     
       72. The method of  claim 70 , wherein step i further comprises bypassing step e when a transient is anticipated that was previously detected in step h.

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