High-speed, low power, medium resolution analog-to-digital converter and method of stabilization

Abstract

A full flash analog to digital converter operates on an input voltage with a track/hold circuit coupled to a reference input of each of multiple comparators. Particular track/hold circuits are activated in sequence through a track/hold select circuit, and a look-up table and a digital-to-analog converter are coupled to supply corrected reference voltages to each track/hold circuit. Outputs of the comparators are supplied to a decoder which produces the digital output representative of the input voltage. The converter is calibrated before it is used for conversion by sensing the input offset voltages of each of the comparators and by altering the reference voltage for each comparator to produce a calibrated reference voltage for each comparator. A digital representation of the calibrated reference voltage for each comparator is stored in a look-up table for retrieval as needed to supply to a particular track/hold circuit a corresponding calibrated analog reference voltage for a particular comparator. Digital representations in the look-up table may indicate switch settings required to provide corrected reference voltages, or may indicate the required corrected reference voltage that is supplied by digital to analog converter which converts the digital representation into an analog corrected reference voltage that is held by the track/hold circuit. In this manner, each track/hold circuit is loaded with its respective calibrated reference voltage. An input signal applied to each comparator triggers such comparators upon parity between the corrected reference voltage and input voltage, and all comparator outputs are supplied to a decoder which produces a digital representation of the input signal. Occasionally, the entries in the look-up table and each track/hold circuit may be refreshed or updated in order to compensate for drift of the calibrated reference voltage.

What is claimed is:  
     
       1. An analog to digital converter for converting an analog input signal to a representative digital output, the analog to digital converter comprising: 
       a memory holding a plurality of digital values, representing reference voltages;  
       a digital to analog converter connected to receive selected ones of the plurality of digital values from the memory for producing therefrom corresponding reference voltages;  
       a plurality of selectable track/hold circuits receiving and holding the reference voltages produced by the digital to analog converter for selecting particular track/hold circuits to receive particular reference voltages;  
       a plurality of comparators, each comparator coupled to a track/hold circuit and having an output and having a first input coupled to receive the reference voltage held by its corresponding track/hold circuit, and a second input coupled to receive the analog input signal; and  
       a decoder receiving the outputs from the plurality of comparators for producing the digital output representative of the analog input signal.  
     
     
       2. The converter of  claim 1 , wherein the memory holds the plurality of digital values in a look-up table. 
     
     
       3. The converter of  claim 1 , wherein each comparator produces a signal indicating whether the magnitude of the analog input signal is greater than the reference voltage. 
     
     
       4. The converter of  claim 1 , wherein each reference voltage comprises: 
       a first voltage component representing an input offset voltage of a comparator; and  
       a second voltage component representing a voltage threshold of the comparator.  
     
     
       5. The converter of  claim 4 , wherein the voltage threshold is determined by a number of bits in the representative digital output. 
     
     
       6. The converter of  claim 1 , wherein the decoder produces the digital output as a multi-bit digital output. 
     
     
       7. An analog to digital converter for converting an analog input voltage into a representative digital output, the converter comprising: 
       circuitry providing a plurality of reference voltages;  
       a plurality of track/hold circuits selectively receiving a particular one of the plurality of reference voltages and producing the received reference voltage on an output;  
       a plurality of comparators, each comparator associated with a track/hold circuit and receiving the output of its associated track/hold circuit as a first input and the analog input voltage as a second input and producing a signal indicating whether a magnitude of the second input is greater than a magnitude of the first input on an output; and  
       a decoder receiving the output of each comparator and producing the representative digital output.  
     
     
       8. The converter of  claim 7 , wherein the circuitry providing a plurality of reference voltages comprises: 
       a memory producing digital representations of the plurality of reference voltages; and  
       a digital to analog converter electronically coupled to the memory producing analog reference voltages represented by the produced digital representations and selectively coupled to the plurality of track/hold circuits.  
     
     
       9. The converter of  claim 8 , wherein the memory holds the digital representations of the plurality of reference voltages in a look-up table. 
     
     
       10. The converter of  claim 7 , wherein the circuitry providing a plurality of reference voltages comprises: 
       a plurality of resistors serially coupled to a reference source for defining a plurality of reference voltages between the resistors.  
     
     
       11. The converter of  claim 10 , wherein each of the plurality of track/hold circuits is selectively coupled to different reference voltages. 
     
     
       12. The converter of  claim 11 , further comprising: 
       a plurality of switches, each switch disposed to selectively couple particular reference voltages to the track/hold circuit.  
     
     
       13. A method of converting an analog input signal into a representative digital output signal using a plurality of comparators having first and second inputs, the method comprising the steps of: 
       calibrating the plurality of comparators to produce calibration reference voltages, each calibration reference voltage associated with a particular comparator;  
       applying each of the calibration reference voltages to the first input of the comparator with which the calibration reference voltage is associated;  
       applying the analog input signal to the second inputs of each of the plurality of comparators during application of the calibration reference voltages; and  
       decoding outputs of the particular ones of the plurality of comparators to produce the representative digital output signal.  
     
     
       14. The method of  claim 13 , wherein applying each of the calibration reference voltages comprises the steps of: 
       selecting a track/hold circuit associated with a particular comparator;  
       retrieving from storage the calibration reference voltage associated with the particular comparator; and  
       applying the retrieved calibrated reference voltage to the selected track/hold circuit.  
     
     
       15. The method of  claim 14 , wherein a digital representation of the calibration reference voltage is stored, and the retrieving step further comprises the step of: 
       converting the stored digital representation of the calibration reference voltage into an analog calibration reference voltage.  
     
     
       16. The method of  claim 14 , wherein the calibration reference voltages is stored in a look-up table. 
     
     
       17. The method of  claim 14 , further comprising the step of: 
       refreshing the selected track/hold circuit with the retrieved calibration reference voltage in order to compensate for drift.  
     
     
       18. The method of  claim 13 , wherein the calibrating step comprises the steps of: 
       measuring an input offset voltage of each of the plurality of comparators to produce a plurality of input offset voltages;  
       dividing a reference voltage into a plurality of threshold voltages; and  
       combining selected ones of the plurality of threshold voltages with selected ones of the plurality of input offset voltages to produce calibration reference voltages.  
     
     
       19. An analog to digital converter for converting an analog input signal to a representative digital output, the analog to digital converter comprising: 
       
         a memory to store a plurality of digital values, representing reference voltages;  
       
       
         structure providing a plurality of reference voltages;  
       
       
         a plurality of selectors, wherein each of said plurality of selectors is responsive to a respective one of the plurality of digital values to select a corresponding one of the plurality of reference voltages; and  
       
       
         a plurality of comparators, each of said plurality of comparators being responsive to a respective one of said plurality of selectors and being in communication with the analog input signal. 
       
     
     
       20. The converter of  claim 19 , further comprising a decoder responsive to said plurality of comparators. 
     
     
       21. The converter of  claim 20 , wherein an output of said decoder comprises a multi- bit digital output.   
     
     
       22. The converter of  claim 19 , further comprising a resistor arrangement to generate the plurality of reference voltage. 
     
     
       23. The converter of  claim 19 , wherein said memory comprises a look- up table.   
     
     
       24. The converter of  claim 19 , further comprising a plurality of sample and hold circuits arranged between respective ones of said plurality of selectors and said plurality of comparators. 
     
     
       25. An analog to digital converter for converting an analog input signal to a representative digital output, the analog to digital converter comprising: 
       
         memory means for storing a plurality of digital values, representing reference voltages;  
       
       
         a plurality of reference voltage means for providing respective reference voltages;  
       
       
         a plurality of selecting means wherein each of said plurality of selecting means is responsive to a respective one of the plurality of digital values for selecting a corresponding one of the plurality of reference voltages; and  
       
       
         a plurality of comparator means, each of said plurality of comparator means being responsive to a respective one of said plurality of selecting means and being in communication with the analog input signal. 
       
     
     
       26. The converter of  claim 25 , further comprising decoder means for decoding outputs of said plurality of comparator means. 
     
     
       27. The converter of  claim 26 , wherein an output of said decoder means comprises a multi- bit digital output.   
     
     
       28. The converter of  claim 25 , further comprising a resistor means for generating the plurality of reference voltages. 
     
     
       29. The converter of  claim 25 , wherein said memory means comprises a look- up table.   
     
     
       30. The converter of  claim 25 , further comprising a plurality of sample and hold means arranged between respective ones of said plurality of selectors and said plurality of comparators for storing a corresponding one of the reference voltages. 
     
     
       31. A method for converting an analog input signal to a representative digital output, comprising the steps of: 
       ( a )  storing a plurality of digital values, representing reference voltages;    
       ( b )  providing a plurality of reference voltages;    
       ( c )  selecting corresponding ones of the plurality of reference voltages in accordance with the digital values stored in step  ( a );  and    
       ( d )  comparing the corresponding ones of the plurality of reference voltages selected in step  ( c )  with the input signal.   
     
     
       32. The converter of  claim 31 , further comprising the step of: 
       ( e )  decoding the results of step  ( d ) .   
     
     
       33. The converter of  claim 32 , wherein an output of step ( e )  comprises a multi - bit digital output.   
     
     
       34. The converter of  claim 32 , further comprising the step of: 
       ( f )  storing the corresponding ones of the plurality of reference voltages selected in step  ( c ) , and    
         wherein step  ( d )  compares the results of step  ( f )  with the input signal.   
     
     
       35. An analog to digital converter for converting an analog input signal to a representative digital output, the analog to digital converter comprising: 
       
         structure providing a plurality of capacitances to store a plurality of reference voltages;  
       
       
         a plurality of comparators, each of said plurality of comparators being responsive to a respective one of said plurality of capacitances and being in communication with the analog input signal;  
       
       
         a decoder responsive to said plurality of comparators; and  
       
       
         a recalibration circuit to refresh each of said plurality of capacitances to minimize drift. 
       
     
     
       36. An analog to digital converter for converting an analog input signal to a representative digital output, the analog to digital converter comprising: 
       
         structure providing a plurality of capacitances to store a plurality of reference voltages;  
       
       
         a plurality of comparators, each of said plurality of comparators being responsive to a respective one of said plurality of capacitances and being in communication with the analog input signal;  
       
       
         a decoder responsive to said plurality of comparators; and  
       
       
         a recalibration circuit to refresh each of said plurality of capacitances to minimize leakage thereof. 
       
     
     
       37. An analog to digital converter for converting an analog input signal to a representative digital output, the analog to digital converter comprising: 
       
         a plurality of capacitance means for storing a plurality of reference voltages;  
       
       
         a plurality of comparator means, each of said plurality of comparator means for comparing a respective one of said plurality of capacitance means to the analog input signal;  
       
       
         decoder means for decoding outputs of said plurality of comparator means; and  
       
       
         recalibration means for refreshing each of said plurality of capacitance means to minimize drift. 
       
     
     
       38. An analog to digital converter for converting an analog input signal to a representative digital output, the analog to digital converter comprising: 
       
         a plurality of capacitance means for storing a plurality of reference voltages;  
       
       
         a plurality of comparator means, each of said plurality of comparator means for comparing a respective one of said plurality of capacitance means to the analog input signal;  
       
       
         decoder means for decoding outputs of said plurality of comparator means; and  
       
       
         recalibration means for refreshing each of said plurality of capacitance means to minimize leakage thereof. 
       
     
     
       39. A method for converting an analog input signal to a representative digital output, the analog to digital converter comprising: 
       ( a )  storing a plurality of reference voltages in respective capacitnaces;    
       ( b )  comparing a respective capacitance to the analog input signal;    
       ( c )  decoding the results of step  ( b ) ; and    
       ( d )  recalibrating each of said plurality of capacitances to minimize drift.   
     
     
       40. A method for converting an analog input signal to a representative digital output, the analog to digital converter comprising: 
       ( a )  storing a plurality of reference voltages in respective capacitances;    
       ( b )  comparing a respective capacitance to the analog input signal;    
       ( c )  decoding the results of step  ( b ) ; and    
       ( d )  recalibrating each of said plurality of capacitances to minimize leakage thereof.