USRE37146EExpiredUtility

Low power infrared scene projector array and method of manufacture

Assignee: HONEYWELL INT INCPriority: Dec 30, 1994Filed: Jan 29, 1999Granted: Apr 24, 2001
Est. expiryDec 30, 2014(expired)· nominal 20-yr term from priority
G01J 5/023H10N 19/00
39
PatentIndex Score
9
Cited by
39
References
37
Claims

Abstract

An array for projecting thermal images and a method of making same. The array of the present invention combines a two-tier architecture created with special processing whereby each pixel member resides on an elevated platform directly over discrete pixel control electronics and electrically conducting traces couple a plurality of pixels so that they can be controlled to project thermal images at equal to or faster than video frame rates. Microlens assemblies coupled to each discrete pixel improves the thermal efficiency of the array for certain applications. In the method of fabrication, a semiconductor microbridge-type structure obtains with the use of sacrificial layers under deposited pixel members in a compact array so that the pixel electronics reside beneath their associated pixel and the array electronics inhabit the same chip as the array thereby improving fill factor and time constant of the resulting array.

Claims

exact text as granted — not AI-modified
We claim:  
     
       1. An apparatus for emitting a wide-band infrared image, comprising: 
       a semiconductor substrate having a plurality of cavities therein;  
       address means disposed on the substrate proximate the plurality of cavities for routing electrical signals to various portions of the substrate, wherein the electrical signals include a pixel addressing signal, a voltage signal, and drive voltage;  
       at least two emitter pixel members coupled to the address means and each disposed above one of the plurality of cavities in the substrate wherein each emitter pixel member comprises a two-level microstructure: a first level bearing a transistor means, and a second level, set apart and disposed above the first level, and comprising the emitter pixel member, wherein the first level is made of silicon nitride and wherein the second level has an absorber and the first level has a reflector layer opposite of and facing the absorber layer;  
       means for connecting, supporting, and thermally isolating each pixel member from the substrate;  
       a trace of electrically resistive material coupled to each pixel member and at least one leg physically and electrically coupled to the substrate;  
       electronic control means for electrically coupling the pixel addressing signal, the voltage signal, and the drive voltage to each emitter pixel member; and,  
       transistor means for driving a controlled amount of electrical current through the trace of electrically resistive material and for maintaining the temperature of the trace.  
     
     
       2. The apparatus of claim  1 , wherein the electrically resistive material is embedded into the second level and wherein the resistive material comprises titanium nitride. 
     
     
       3. The apparatus of claim  2 , wherein electronic control means comprises a pixel decoder/multiplexer select circuit and a row enable decoder each electrically coupled to a plurality of discrete pixel column group electrical interconnections. 
     
     
       4. The apparatus of claim  3 , further comprising a plurality of emitter pixel members disposed in an array configuration and having a fill factor greater than eighty percent. 
     
     
       5. The apparatus of claim  4 , further comprising a microlens assembly coupled to the substrate with a plurality of stand off posts, so that a single microlens optically couples to each emitter pixel member. 
     
     
       6. The apparatus of claim  5 , wherein the plurality of stand-off posts comprise silicon nitride with a layer of thin film solder proximate the microlens assembly which is previously electroplated to the substrate. 
     
     
       7. The apparatus of claim  4  wherein the plurality of emitter pixels comprise an array on a 3.5 mil pitch. 
     
     
       8. The apparatus of claim  7  wherein the array comprises at least a 512 by 512 array of 262,144 emitter pixels. 
     
     
       9. The apparatus of claim  1 , further comprising: 
       a layer of planarization oxide disposed covering said transistor means,  
       a passivating layer disposed covering said planarization oxide layer; and,  
       a reflector layer is disposed covering said passivating layer, so that said reflector layer opposes said second level.  
     
     
       10. The apparatus of claim  9 , further comprising: 
       an absorber layer disposed on a nitride layer formed on the second level, directly opposing the reflector layer across a gap region.  
     
     
       11. The apparatus of claim  10 , wherein said gap region is evacuated to a pressure less than ambient pressure. 
     
     
       12. The apparatus of claim  11 , wherein said reflector layer and said absorber layer contain the same surface area. 
     
     
       13. The apparatus of claim  12 , further comprising a metallic plug member disposed to electrically couple only to the electrically resistive material and the electronic control means without establishing electrical contact with said reflector layer or said absorber layer. 
     
     
       14. Apparatus for emitting a wide- band infrared image comprising:    
         a )  a substrate, said substrate having a reflective surface;    
         b )  an emitter pixel member supported above and by said substrate, said emitter pixel member being  ( i )  comprised of material which, when heated, emits infrared radiation and  ( ii )  spaced above said reflective surface of said substrate so as to define a cavity therebetween; and    
         c )  electrical connection means connected to said emitter pixel member and adapted to selectively apply electric current thereto so as to heat said member;    
         d )  said apparatus being further characterized by the distance between said reflective surface and said emitter pixel member being selected to provide a tuned optical cavity to thus provide a high optical emissivity of said emitter pixel member over a preselected band of infrared wavelengths.   
     
     
       15. The apparatus of claim  14  wherein said emitter pixel member also has absorber characteristics. 
     
     
       16. The apparatus of claim  14  wherein said emitter pixel member includes an absorber layer. 
     
     
       17. The apparatus of claim  14  wherein said substrate is of semiconductor material. 
     
     
       18. The apparatus of claim  17  further characterized by having integrated circuit means disposed on said semiconductor substrate. 
     
     
       19. The apparatus of claim  18  further characterized by said reflective surface being an infrared reflector layer. 
     
     
       20. The apparatus of claim  18  further characterized by said electrical connection means including said integrated circuit means. 
     
     
       21. The apparatus of claim  16  further characterized by said material being titanium nitride. 
     
     
       22. The apparatus of claim  14  further comprising a plurality of emitter pixel members disposed in an array configuration. 
     
     
       23. The apparatus of claim  22  wherein each of said emitter pixel members includes absorber means. 
     
     
       24. The apparatus of claim  23  wherein said substrate is of semiconductor material. 
     
     
       25. The apparatus of claim  24  wherein integrated circuit means are disposed on said semiconductor substrate. 
     
     
       26. The apparatus of claim  25  wherein said reflective surface of said substrate is an infrared reflector layer. 
     
     
       27. The apparatus of claim  26  wherein said electrical connection means includes said integrated circuit means. 
     
     
       28. The apparatus of claim  23  wherein said material is titanium nitride. 
     
     
       29. The apparatus of claim  14  wherein said support of said emitter pixel member by said substrate includes means for thermally isolating said member from said substrate. 
     
     
       30. The apparatus of claim  22  wherein said support of each of said pixel members by said substrate includes means for thermally isolating said members from said substrate. 
     
     
       31. The apparatus of claim  14  further comprising a trace of electrically resistive material disposed on said emitter pixel member and on a leg physically and electrically coupled to said substrate, said leg facilitating the thermal isolation of said member from said substrate. 
     
     
       32. The apparatus of claim  27  wherein said integrated circuit means includes address means for routing electrical signals to various portions of said substrate, said signals including a pixel addressing signal, a voltage signal, and drive voltage; and said apparatus further comprises electronic control means for electrically coupling said signals to said emitter pixel members. 
     
     
       33. The apparatus of claim  32  further comprising: 
         a )  a trace of electrically resistive material disposed on said emitter pixel members and on legs respectively physically and electrically coupling said members to said substrate, said legs facilitating the thermal isolation of said members from said substrate, and    
         b )  means for driving a controlled amount of electrical current through said trace of resistive material.   
     
     
       34. The apparatus of claim  33  wherein said electronic control means comprises a pixel decoder/multiplexer select circuit and a row enable decoder each electrically coupled to a plurality of discrete pixel column group electrical interconnections. 
     
     
       35. An apparatus for emitting a wide- band infrared image comprising:    
         a )  a semiconductor substrate;    
         b )  integrated circuit means disposed on the substrate;    
         c )  an array of emitter pixel members supported above and by said substrate and electrically coupled to said integrated circuit means, each of said emitter pixel members being  ( i )  comprised of material which, when heated, emits infrared radiation and  ( ii )  spaced above said substrate so as to define a cavity therebetween; and apply electric current thereto so as to heat said member;    
         d )  an infrared reflector layer disposed on said substrate opposite said emitter pixel members;    
       
         said apparatus being further characterized by the distance between said reflector layer and said emitter pixel members being selected to provide a tuned optical cavity to thus provide a high optical emissivity of said emitter pixel members over a preselected band of infrared wavelengths. 
       
     
     
       36. The apparatus of claim  35  wherein said emitter pixel members also have absorber characteristics. 
     
     
       37. The apparatus of claim  35  wherein each of said emitter pixel members includes an absorber layer.

Join the waitlist — get patent alerts

Track USRE37146E — get alerts on status changes and closely related new filings.

We store only your email — no account needed. See our privacy policy.