RF transistor package with nickel oxide barrier

Abstract

An improved transistor package with superior stability to wave soldering, having a nickel oxide barrier strip formed on the surface of the leads.

What is claimed is:  
     
       1. A semiconductor device comprising in combination: 
       a thermally and electrically conducting base member;  
       a thermally conducting, electrically insulating support for a semiconductor die, said support having upper and lower surfaces, said lower surface coupled to said base member and said upper surface having a conductive coating thereon;  
       a semiconductor die mounted on and electrically coupled to said upper surface of said support;  
       a plurality of gold-plated leads mounted on said upper surface of said support and electrically connected to said semiconductor die, each of said leads having a nickel oxide barrier strip near the end of the lead proximate to the semiconductor die, said oxide barrier strip of a size and shape adapted to accept the leading edge of a protective cap; and  
       a protective cap for the semiconductor die, said cap non-hermetically sealed by epoxy to the leads and the support at the nickel oxide barrier strip, said strip protecting said semiconductor die from contamination by solder.  
     
     
       2. A device of claim  1  in which the nickel oxide barrier strip width is greater than the wall thickness of the cap. 
     
     
       3. A device of claim  1  in which the cap is non-hermetically sealed to the support and leads with epoxy. 
     
     
       4. A device of claim  1  in which the semiconductor support is a beryllium oxide support. 
     
     
       5. A device of claim  1  in which the base member is formed from copper. 
     
     
       6. A device of claim  1  in which the gold-plated leads are selected from the group consisting of goldplated nickel, gold-plated kovar, and gold-plated alloy  42 . 
     
     
       7. A semiconductor device comprising in combination, 
       a copper flange;  
       a beryllium oxide pill having a thin gold coating mounted on said flange;  
       a transistor die mounted on the pill;  
       gold-plated leads mounted on said pill, said leads electrically connected to said transistor die, said leads having nickel oxide barrier strips near the ends of the leads proximate to the die; and  
       a ceramic cap covering the die, the edges of said cap non-hermetically sealed by epoxy to the oxide barrier strips, said strips protecting said semiconductor die from contamination by solder.  
     
     
       8. An electronic structure, comprising: 
       
         one or more electronic devices; and  
       
       
         leads, in a fixed spatial relationship to said devices, comprising a first metal covered by a layer of a second metal, said layer of second metal being predominantly, but not entirely, covered by a layer of gold;  
       
       
         at least some ones of said leads comprising a respective inner portion separated from a respective outer portion by a respective barrier portion on which said gold layer is absent, and an oxide of said second metal is present over said second metal;  
       
       
         multiple portions of said semiconductor devices each being electrically connected to a respective inner portion of a respective one of said leads. 
       
     
     
       9. The device of claim  8 , wherein said multiple portions of said semiconductor devices are each wire- bonded to a respective inner portion of a respective one of said leads.   
     
     
       10. The device of claim  8 , wherein said devices include both a capacitor and also a discrete transistor. 
     
     
       11. The device of claim  8 , wherein said second metal is nickel. 
     
     
       12. The device of claim  8 , wherein said first metal is Kovar. 
     
     
       13. An electronic structure, comprising: 
       
         one or more electronic devices;  
       
       
         a cap enclosing said electronic devices; and  
       
       
         leads, in a fixed spatial relationship to said devices, comprising a first metal covered by a layer of a second metal, said layer of second metal being predominantly, but not entirely, covered by a layer of gold;  
       
       
         at least some ones of said leads comprising a respective inner portion separated from a respective outer portion by a respective barrier portion on which said gold layer is absent, and an oxide of said second metal is present over said second metal;  
       
       
         said inner portions of said leads being inside said cap, said outer portions of said leads being outside said cap, and said cap being bonded to said barrier portions of said leads;  
       
       
         multiple portions of said semiconductor devices each being electrically connected to a respective inner portion of a respective one of said leads. 
       
     
     
       14. The device of claim  13 , wherein said multiple portions of said semiconductor devices are each wire- bonded to a respective inner portion of a respective one of said leads.   
     
     
       15. The device of claim  13 , wherein said devices include both a capacitor and also a discrete transistor. 
     
     
       16. The device of claim  13 , wherein said second metal is nickel. 
     
     
       17. The device of claim  13 , wherein said first metal is Kovar. 
     
     
       18. An electronic structure, comprising: 
       
         a dielectric substrate;  
       
       
         one or more electronic devices mechanically affixed to said substrate; and  
       
       
         a plurality of leads mechanically affixed to said substrate, and each comprising a first metal covered by a layer of a second metal, said layer of second metal being predominantly, but not entirely, covered by a layer of gold;  
       
       
         at least some ones of said leads comprising a respective inner portion separated from a respective outer portion by a respective barrier portion on which said gold layer is absent, and an oxide of said second metal is present over said second metal;  
       
       
         multiple portions of said semiconductor devices each being electrically connected to a respective inner portion of a respective one of said leads. 
       
     
     
       19. The device of claim  18 , wherein said multiple portions of said semiconductor devices are each wire- bonded to a respective inner portion of a respective one of said leads.   
     
     
       20. The device of claim  18 , wherein said devices include both a capacitor and also a discrete transistor. 
     
     
       21. The device of claim  18 , wherein said second metal is nickel. 
     
     
       22. The device of claim  18 , wherein said first metal is Kovar.