Semiconductor integrated circuit device having built-in voltage drop circuit

Abstract

A semiconductor integrated circuit device includes a voltage drop circuit for generating a dropped voltage from a power supply voltage externally supplied to a power supply line, and a plurality of circuits respectively connected to the voltage drop circuit and driven by the dropped voltage. A switching unit, which is connected to at least one of the circuits, connects the power supply line to the above one of the circuits in synchronism with operation of the above one of the circuits. The above one of the circuits is driven by currents from both the voltage drop unit and the power supply line in synchronism with the operation thereof.

What is claimed is: 
     
       1. A semiconductor integrated circuit device comprising: voltage drop means for generating a dropped voltage from a power supply voltage externally supplied to a power supply line;   a plurality of circuits respectively connected to the voltage drop means and driven by the dropped voltage; and   switching means, connected to at least one of the circuits, for connecting the power supply line to said at least one of the circuits in synchronism with operation of said at least one of the circuits, such that currents are simultaneously supplied to the circuits from the voltage drop means and the power supply line, in order to prevent a reduction in the dropped voltage.   
     
     
       2. The semiconductor integrated circuit device as claimed in claim 1, wherein said switching means comprises: a switch provided between the power supply line and said at least one of the circuits; and   switch control means, connected to said at least one of the circuits, for receiving a driving signal for driving said at least one of the circuits and for controlling the switch to connect the power supply line and said at least one of the circuits when the driving signal is received.   
     
     
       3. The semiconductor integrated circuit device as claimed in claim 2, wherein a current passing through the switch has a magnitude equal to that of a current passing through said at least one of the circuits. 
     
     
       4. The semiconductor integrated circuit device as claimed in claim 2, wherein: the switch comprises an n-channel MOS transistor connected between the power supply line and said at least one of the circuits; and   said switch control means comprises a one-shot pulse generator for generating a one-shot pulse in response to the driving signal and for applying the one-shot pulse to a gate of the n-channel MOS transistor.   
     
     
       5. The semiconductor integrated circuit device as claimed in claim 4, wherein said one-shot pulse generator comprises delay means for delaying the driving signal by a predetermined delay time so that the one-shot pulse is generated after the predetermined delay time. 
     
     
       6. The semiconductor integrated circuit device as claimed in claim 2, wherein: the switch comprises a p-channel MOS transistor connected between the power supply line and said at least one of the circuits; and   said switch control means comprises a one-shot pulse generator for generating a one-shot pulse in response to the driving signal and for applying the one-shot pulse to a gate of the p-channel MOS transistor.   
     
     
       7. The semiconductor integrated circuit device as claimed in claim 6, wherein said one-shot pulse generator comprises delay means for delaying the driving signal by a predetermined delay time so that the one-shot pulse is generated after the predetermined delay time. 
     
     
       8. The semiconductor integrated circuit device as claimed in claim 1, wherein: the circuits respectively comprise memory cells and sense amplifiers; and   the semiconductor integrated circuit device is a dynamic random access memory device.   
     
     
       9. The semiconductor integrated circuit device as claimed in claim 1, wherein: the circuits respectively comprise memory cells and sense amplifiers; and   the semiconductor integrated circuit device is a flash memory device.   
     
     
       10. A semiconductor integrated circuit device comprising: voltage drop means for generating a dropped voltage from a power supply voltage externally supplied to a power supply line;   a plurality of circuits respectively connected to the voltage drop means and driven by the dropped voltage; and   switching means, connected to at least one of the circuits, for connecting the power supply line to said at least one of the circuits in synchronism with operation of said at least one of the circuits so that a first current from the power supply line increases as a second current passing through said at least one of the circuits increases,   said at least one of the circuits being driven by currents from both the voltage drop means and the power supply line in synchronism with the operation thereof.   
     
     
       11. The semiconductor integrated circuit device as claimed in claim 10, wherein said switching means comprises: a switch connected between the power supply line and said at least one of the circuits; and   switch control means, connected to said at least one of the circuits, for receiving a driving signal for driving said at least one of the circuits and for controlling the switch to connect the power supply line and at least one of the circuits in response to the driving signal so that the first current from the power supply line increases as the second current passing through said at least one of the circuits increases.   
     
     
       12. The semiconductor integrated circuit device as claimed in claim 11, wherein: said switch comprises current magnitude control means for controlling the magnitude of the first current in accordance with a control signal; and   said switching control means comprises current detection means for detecting the magnitude of the second current passing through at least one of the circuits and for generating the control signal dependent on the magnitude of the second current.   
     
     
       13. The semiconductor integrated circuit device as claimed in claim 11, wherein: said switch comprises a transistor connected between the power supply line and said at least one of the circuits; and   said control signal is applied to a gate of the transistor so that the degree of ON state of the transistor is controlled in accordance with the control signal.   
     
     
       14. The semiconductor integrated circuit device as claimed in claim 11, wherein said switch control means comprises means for increasing the first current passing through the switch as the second current passing through said at least one of the circuits increases. 
     
     
       15. The semiconductor integrated circuit device as claimed in claim 13, wherein said transistor is a p-channel MOS transistor. 
     
     
       16. The semiconductor integrated circuit device as claimed in claim 10, wherein: the circuits respectively comprise memory cells and sense amplifiers; and   the semiconductor integrated circuit device is a dynamic random access memory device.   
     
     
       17. The semiconductor integrated circuit device as claimed in claim 10, wherein: the circuits respectively comprise memory cells and sense amplifiers; and   the semiconductor integrated circuit device is a flash memory device. .Iadd.   
     
     
       18.  A semiconductor device comprising: a circuit receiving a power supply voltage and being selectively activated in response to a control signal;   a first power supply circuit for supplying a first voltage as the power supply voltage to said circuit; and   a second power supply circuit for temporarily supplying a second voltage as the power supply voltage to said circuit in response to the control signal when said circuit is activated wherein the magnitude of the second voltage is larger than the first voltage. .Iaddend..Iadd.19. The semiconductor device as claimed in claim 18, wherein the circuit is activated during a predetermined period, and wherein said second power supply circuit supplies the second voltage during an initial period in the predetermined period. .Iaddend..Iadd.20. The semiconductor device as claimed in claim 18, wherein said second power supply circuit comprises a pulse generator for generating a pulse in response to the control signal, and wherein the second voltage is supplied in response to the pulse. .Iaddend..Iadd.21. A semiconductor device comprising:   a circuit receiving an operating current and being selectively activated;   a first power supply circuit for supplying a first current to said circuit; and   a second power supply circuit for temporarily supplying second current to said circuit when said circuit is activated whereby the operating current is temporarily increased. .Iaddend..Iadd.22. A semiconductor memory device comprising:   a plurality of memory cells;   a plurality of bit lines operatively connected to said memory cells;   a plurality of sense amplifiers operatively connected to said bit lines respectively and selectively activated in response to a control signal;   a first power supply circuit operatively connected to said sense amplifiers for supplying a first power supply voltage as a power supply voltage of the sense amplifiers; and   a second power supply circuit operatively connected to said sense amplifiers for temporarily supplying a second voltage, which has a larger magnitude than the first voltage, as the power supply voltage in response to the control signal when the sense amplifiers are activated.   
     
     
        .Iaddend..Iadd.23.  The semiconductor memory device as claimed in claim 22, wherein the second power supply circuit comprises a pulse generator for generating pulses in response to the control signal, a magnitude of the power supply voltage is increased in response to the pulses. .Iaddend..Iadd.24. The semiconductor memory device as claimed in claim 22, wherein the sense amplifiers are activated during a predetermined period in response to the control signal, and wherein the second voltage is supplied during an initial period in the predetermined period. .Iaddend..Iadd.25. The semiconductor memory device as claimed in claim 22, wherein the sense amplifiers are CMOS type amplifiers each having a first terminal and a second terminal receiving the power supply voltage therebetween. .Iaddend..Iadd.26. The semiconductor memory device as claimed in claim 25, further comprising: a first switch operatively connected to the first terminal;   a second switch operatively connected to the second terminal;   wherein the first and second switches are turned on in response to the control signal for supplying the power supply voltage therethrough to the CMOS type amplifier. .Iaddend..Iadd.27. The semiconductor memory device as claimed in claim 22, further comprising:   a sense amplifier driving circuit connected between the first and second power supply circuits and the sense amplifiers, for activating the sense   
     
     
        amplifiers in response to the control signal. .Iaddend..Iadd.28.  A semiconductor memory device, comprising: a plurality of memory cells;   a plurality of bit lines operatively connected to said memory cells;   a plurality of sense amplifiers operatively connected to said bit lines, respectively, and selectively activated in response to a control signal;   a power supply line operatively connected to the sense amplifiers for supplying a power supply voltage;   a current detection circuit, connected to the power supply line, for generating a detection signal when a predetermined current is detected; and   a power supply circuit increasing the magnitude of the power supply voltage   
     
     
        in response to the detection signal. .Iaddend..Iadd.29.  A semiconductor memory device comprising: a plurality of memory cells;   a plurality of bit lines operatively connected to said memory cells;   a plurality of sense amplifiers operatively connected to said bit lines respectively and selectively activated in response to a control signal;   a power supply line operatively connected to the sense amplifiers for supplying an operating current;   a current detection circuit, connected to the power supply line, for generating a detection signal when a predetermined current is detected; and   a power supply circuit for supplying the operating current in response to the detection signal. .Iaddend.