Light emitting device with improved electrode structure to minimize short circuiting

Abstract

A light emitting device is disclosed which includes a semiconductor block, an active layer disposed in such a fashion as to penetrate through the mutually facing end surfaces of the semiconductor block, and an electrode disposed on the main plane of the semiconductor block, wherein the electrode consists of a first electrode portion disposed along the active layer, and a second electrode portion continuing integrally the first electrode portion and having the periphery thereof out of contact from the periphery of the second main plane of the semiconductor block. A current is caused to uniformly flow through the entire active layer, and a light emitting operation is carried out stably. Since the electrode is not disposed on the periphery of the semiconductor block, the occurrence of junction short-curcuit, which might otherwise occur when a wafer is cut off to produce laser chips or when the corners of the chip break off, can be reduced.

What is claimed is: 
     
       1. A light emitting device comprising: (1) a semiconductor block consisting essentially of: (a) a first main plane;   (b) a second main plane facing said first main plane;   (c) a first end surface interposed between said first and second main planes;   (d) a second end surface facing said first end surface and interposed between said first and second main planes;   (e) a first side wall interposed between said first and second main planes and said first and second end surfaces;   (f) a second side wall facing said first side wall and interposed between said first and second main planes and said first and second end surfaces; and   (g) a light emitting region having a longitudinal axis extending between said first and second end 10 surfaces so that one of the ends thereof is exposed on said first end surface and the other end thereof is exposed on said second end surface, wherein said second main .[.surface.]. .Iadd.plane .Iaddend.has a periphery including end peripheral edges at intersections of said second main plane and said first and second end surfaces and side peripheral edges at the intersections of said second main plane and said first and second side walls; and     (2) an electrode consisting essentially of: (a) a first electrode portion disposed on said second main plane of said semiconductor block along said light emitting region, and having the width thereof greater than the width of said light emitting region; and   (b) a second electrode portion disposed on said second main plane of said semiconductor block, connected completely integrally with said first electrode portion, and having a periphery thereof recessed along said second main plane to be out of contact from both the end peripheral edges and the side peripheral edges of the periphery of said .Iadd.second .Iaddend.main plane, wherein the length of said first electrode portion in a direction parallel to the longitudinal axis of said light emitting region is at least longer than that of said second electrode portion. .Iadd.     
     
     
       2.  A light emitting device comprising: a) a semiconductor block having a first main plane and a second main plane facing said first main plane:   b) a first end surface and a second end surface of said semiconductor block facing to each other and being interposed between said first and second main planes;   c) a first side wall and a second side wall of said semiconductor block facing to each other and being interposed between said first and second main planes and between said first and second end surfaces;   d) a light emitting region extending between said first and second end surfaces so that one of the ends thereof is exposed on said first end surface and the other end thereof is exposed on said second end surface, wherein said second main plane has end peripheral edges at intersections of said second main plane and said first and second end surfaces, and said second main plane further includes side peripheral edges at intersections of said second main plane and said first and second side walls; and   e) an electrode disposed on said second main plane of said semiconductor block, said electrode having a first side being substantially in parallel with said side peripheral edges and a second side being substantially in parallel with said end peripheral edges, wherein said first and second sides of said electrode are recessed from both said side peripheral edges and said end peripheral edges, respectively. .Iaddend. .Iadd.   
     
     
       3.  A light emitting device according to claim 2, wherein said electrode has a bonding area to which a bonding wire is to be bonded, wherein said bonding area is positioned so as not to be directly over said light emitting region, and wherein said bonding wire is connected to said bonding area of said electrode. .Iaddend. .Iadd.4. A light emitting device according to claim 2, wherein portions of said electrode in proximity of corners of said semiconductor block are chamfered. .Iaddend. .Iadd.5. A light emitting device according to claim 2, further comprising an insulating film formed between said second main plane and said electrode, wherein said insulating film has an opening portion disposed over said light emitting region, and wherein a portion of said electrode is electrically connected to said light emitting region through said opening portion so that operating current for said light emitting device is supplied to said light emitting region. .Iaddend. .Iadd.6. A light emitting device according to claim 5, wherein said insulating film is a silicon dioxide film. .Iaddend. .Iadd.7. A light emitting device according to claim 5, wherein said electrode is comprised of gold. .Iaddend. .Iadd.8. A light emitting device according to claim 1, wherein said electrode is an anode electrode for said light emitting device. .Iaddend. 
     
     
        .Iadd.9.  A light emitting device according to claim 5, wherein said electrode is an anode electrode for said light emitting device. .Iaddend. 
     
     
        .Iadd.10.  A light emitting device comprising: a) a semiconductor block having a first main plane and a second main plane facing said first main plane;   b) a first end surface and a second end surface of said semiconductor block facing to each other and being interposed between said first and second main planes;   c) a first side wall and a second side wall of said semiconductor block facing to each other and being interposed between said first and second main planes and between said first and second end surfaces;   d) a light emitting region extending between said first and second end surfaces so that one of the ends thereof is exposed on said first end surface and the other end thereof is exposed on said second end surface, wherein said second main plane has end peripheral edges at intersections of said second main plane and said first and second end surfaces, and said second main plane further including side peripheral edges at intersections of said second main plane and said first and second side walls; and   e) an electrode disposed on said second main plane of said semiconductor block, said electrode having a first portion extending over said light emitting region and a second portion disposed so as not to be directly over said light emitting region, wherein said second portion of said electrode has a periphery recessed from both said side peripheral edges   
     
     
        and said end peripheral edges. .Iaddend. .Iadd.11.  A light emitting device according to claim 10, wherein said semiconductor block includes a multi-layered grown layer which is comprised of a buffer layer of an n-type InP, an active layer of InGaAsP on said buffer layer and a cladding layer of a p-type InP on said active layer, wherein said light emitting region is formed in said active layer of said multi-layered grown layer. .Iaddend. .Iadd.12. A light emitting device according to claim 11, wherein said multi-layered grown layer forms a double heterojunction structure. .Iaddend. .Iadd.13. A light emitting device comprising: a) a box-shaped semiconductor chip having a tetragonal main surface, said tetragonal main surface having first parallel edges and second parallel edges;   b) a light emitting region formed in said box-shaped semiconductor chip, said light emitting region extending substantially in parallel with said tetragonal main surface and said second parallel edges; and   c) an electrode formed on said tetragonal main surface, said electrode including a first portion and a second portion, said first portion of said electrode being disposed over said light emitting region and extending along said second parallel edges, said second portion of said electrode extending from said first portion along said first parallel edges,   wherein said second portion of said electrode is recessed from at least one of said first parallel edges and at least one of said second parallel   
     
     
        edges. .Iaddend. .Iadd.14.  A light emitting device according to claim 13, wherein a bonding wire for providing operating current to said light emitting device is connected to said second portion of said electrode. .Iaddend. .Iadd.15. A light emitting device according to claim 13, wherein said box-shaped semiconductor chip includes a multi-layered grown layer which is comprised of a buffer layer of an n-type InP, an active layer of InGaAsP on said buffer layer and a cladding layer of a p-type InP on said active layer, wherein said light emitting region is formed in said active layer of said multi-layered grown layer. .Iaddend. .Iadd.16. A light emitting device according to claim 15, wherein said multi-layered grown layer forms a double heterojunction structure. .Iaddend. .Iadd.17. A light emitting device comprising: a) a box-shaped semiconductor chip having a tetragonal main surface, said tetragonal main surface having first parallel edges and second parallel edges;   b) a light emitting region formed in said box-shaped semiconductor chip, said light emitting region extending substantially in parallel with said tetragonal main surface and said second parallel edges; and   c) an electrode formed on said tetragonal main surface, said electrode including a first portion and a second portion, said first portion of said electrode being disposed over said light emitting region and extending along said second parallel edges, said second portion of said electrode extending from said first portion along said first parallel edges,   wherein said second portion of said electrode has a periphery which is not extended to at least one of said first parallel edges and at least one of said second parallel edges. .Iaddend. .Iadd.18. A light emitting device according to claim 17, wherein a bonding wire for providing operating current to said light emitting device is connected to said second portion of said electrode. .Iaddend. .Iadd.19. A light emitting device according to claim 17, wherein said box-shaped semiconductor chip includes a multi-layered grown layer which is comprised of a buffer layer of an n-type InP, an active layer of InGaAsP on said buffer layer and a cladding layer of a p-type InP on said active layer, wherein said light emitting region is formed in said active layer of said multi-layered grown layer.   
     
     
        .Iaddend. .Iadd.20.  A light emitting device according to claim 19, wherein said multi-layered grown layer forms a double heterojunction structure. .Iaddend. .Iadd.21. A light emitting device comprising: a) a box-shaped semiconductor chip having a tetragonal main surface, said tetragonal main surface having first parallel edges and second parallel edges;   b) a light emitting region formed in said box-shaped semiconductor chip, said light emitting region extending substantially in parallel with said tetragonal main surface and said second parallel edges; and   c) an electrode formed on said tetragonal main surface, said electrode including a first portion and a second portion, said first portion of said electrode being disposed over said light emitting region and extending along said second parallel edges, said second portion of said electrode extending from said first portion toward said second parallel edges along said first parallel edges,   wherein said second portion of said electrode has a periphery spaced from at least one of said first parallel edges and at least one of said second parallel edges. .Iaddend.