Data shifting and rotating apparatus
Abstract
.[.A circuit for rotating a multibit binary word in either the right or the left direction includes a scale factor decoder receiving a scale factor word which specifies the magnitude of the rotation and a direction control signal which specifies the direction of rotation and providing a shift control word which is the same as the scale factor word when a right rotation is specified but providing a shift control word which is the complement of the scale factor word when a left rotation is specified. The circuit also includes a plurality of input buffers receiving an input word and providing corresponding input data, and a one-bit rotator receiving the input data and the direction control signal and rotating the input data in the right direction by one position when a left rotation is specified or providing the input data without rotation when a right rotation is specified. In addition, the circuit includes a network receiving data from the one-bit rotator and the shaft control word and rotating the data from the one-bit rotator in only the right direction by a magnitude specified by the shift control word. Furthermore, the circuit includes a plurality of output buffers receiving the data from the network and providing an output word..]..Iadd.A data shift/rotate circuit is designed to have the capability of either shifting or rotating data by a number of bit positions prescribed by an input word. The shifting vs. rotating is selected by a binary digital rotate control signal (ROT). The shifting or rotating can be either to the right or to the left, depending upon a binary digital direction control signal (L/R). .Iaddend.
Claims
exact text as granted — not AI-modifiedWhat is claimed is: .[.1. A circuit for rotating an N-bit binary word in either a first or a second direction comprising:
control signals..]. .[.3. A shift/rotate circuit as recited in claim 2 wherein the unidirectional shift/rotate means comprise a plurality of ranked levels including a first and a last level, each level being adapted to receive incoming data, a respective one of the shift control signals and the rotate control signal, each level being responsive to the respective shift control signal and the rotate control signal for rotating the incoming data in the first direction by a predetermined number of positions, each level being responsive to the respective shaft control signal for shifting the incoming data in the first direction by the predetermined number of positions when the rotate control signal is absent, each level providing the incoming data without shift or rotation when the respective shift control signal is absent, each level except the first being coupled to receive data from the immediately preceding level, the first level being coupled to receive data from the one-bit rotate means, and the last level providing data to the output means..]. .[.4. A shift-rotate circuit as recited in claim 3 wherein the one-bit rotate means comprise: N input conductors representing N bit positions including a first and a last bit position along the second direction; N output conductors representing N bit positions including a first and a last bit position along the second direction; means providing a no-rotation control signal when the direction control signal is absent; a no-rotation conductor for transmitting the no-rotation signal control signal; a direction conductor for transmitting the direction control signal; a plurality of first switch means, a respective one coupled between each input conductor and a corresponding output conductor representing a like bit position for transferring data signals on the input conductors to the corresponding output conductors in response to the no-rotation signal; and a plurality of second switch means, a respective one coupled between each input conductor except the one representing the first bit position and an output conductor representing a bit position displaced by one position in the first direction from that represented by the input conductor, and a respective one coupled between the input conductor representing the first bit position and the output conductor representing the last bit position, the second switch means transferring a data signal from the input conductor to the output conductor coupled thereby in response to the direction control signal..]. .[.5. A shift/rotate circuit as recited in claim 4 wherein each level of the unidirectional shift/rotate means comprises: N input conductors representing N bit positions including a first and a last bit position along the second direction; N output conductors representing N bit positions including a first and a last bit position along the second direction; means providing a no-shift signal when the respective shift control signal is absent; a no-shift conductor for transmitting the no-shift control signal; a shift conductor for transmitting the respective shift control signal; a rotate conductor for transmitting the rotate control signal; a plurality of third switch means, a respective one coupled between each input conductor and a corresponding output conductor of a like bit position for transferring data signals on the input conductors to the corresponding output conductors in response to the no-shift signal; a plurality of fourth switch means, a respective one coupled between each input conductor except the ones representing those bit positions which are less than the predetermined number of positions from the first bit position and an output conductor representing a bit position displaced by the predetermined number of positions in the first direction from that represented by the input conductor, the fourth switch means transferring a data signal from the input conductor to the output conductor coupled thereby in response to the respective shift control signal; and one or more fifth switch means, a respective one coupled between each input conductor representing a bit position which is less than the predetermined number of positions from the first bit position and an output conductor representing a bit position circularly displaced by the predetermined number of bit positions in the first direction from that represented by the input conductor, the fifth switch means transferring a data signal from the input conductor to the output conductor coupled thereby in response to the rotate control signal..]. .[.6. A shift/rotate circuit as recited in claim 5 wherein the control means comprise a plurality of logic circuits each adapted to receive a respective one of the scale factor signals and the direction control signal and providing a shift control signal which is the EXCLUSIVE OR function of the respective scale factor signal and the direction control signal, the input means comprise a plurality of strobed inverter circuits each adapted to receive a respective bit of the input word and a first signal and being responsive thereto for providing a corresponding bit of input data, the output means comprise a plurality of inverter circuits each adapted to receive a respective bit of the data from the unidirectional shift/rotate means and providing a corresponding bit of the output word, the means providing the no-rotation control signal of the one-bit rotate means comprise an inverter circuit adapted to receive the direction control signal and providing the complement thereof to the no-rotation conductor, the means providing the no-shift control signal in each level of the unidirectional shift/rotate means comprise an inverter circuit adapted to receive the respective shift control signal and providing the complement thereof to the no-shift conductor, the plurality of first switch means of the one-bit rotate means each comprise an IGFET transmission gate having a control electrode coupled to the no-rotation conductor, the plurality of second switch means of the one-bit rotate means each comprise an IGFET transmission gate having a control electrode coupled to the direction conductor, the plurality of third switch means in each level of the unidirectional shift/rotate means each comprise an IGFET transmission gate having a control electrode coupled to the no shift conductor, the plurality of fourth switch means of the unidirectional shift/rotate means each comprise an IGFET transmission gate having a control electrode coupled to the shift conductor, and the plurality of fifth switch means of the unidirectional shift/rotate means each comprise an IGFET transmission gate having a control electrode coupled to the rotate conductor..]. .[.7. A shift/rotate circuit as recited in claim 6 wherein the strobed inverter circuits of the input means each comprises a first IGFET having a conduction channel coupled between a first conductor adapted to receive a first operating voltage and a first node and a gate electrode adapted to receive a respective bit of the input word, and a second IGFET having a conduction channel coupled between the first node and a respective one of the input conductors of the one-bit rotate means and a gate electrode adapted to receive the first signal; the IGFET transmission gates of the first, second, third, fourth, and fifth switch means each comprises an IGFET having a gate electrode serving as the control electrode; and there are included precharge means comprising a plurality of load IGFETs each having a conduction channel coupled between a second conductor adapted to receive a second operating voltage and a respective one of the output conductors of one of the levels of unidirectional shift/rotate means or the one-bit rotate means and a gate electrode adapted to receive a second signal, the precharge means being responsive to the second signal for holding the output conductors of the one of the levels of unidirectional shift/rotate means or of the one-bit rotate means at substantially the second operating voltage..]. .[.8. A shift/rotate circuit as recited in claim 7 wherein the first and second IGFETs of the strobed inverter circuits, the IGFETs of the transmission gates of the first, second, third, fourth and fifth switch means are of a first channel conductivity type and the load IGFETs of the precharge means are of a second channel conductivity type..]. .[.9. A shift/rotate circuit as recited in claim 8 wherein the precharge means further comprise a plurality of sustaining IGFETs of the second channel conductivity type and having a relatively small channel width to channel length ratio, each sustaining IGFET having a conduction channel coupled in parallel with a respective one of the load IGFETs and a gate electode coupled to the first conductor..]. .[.10. A shift/rotate circuit as recited in claim 9 wherein the first channel conductivity type is n-type and the second channel conductivity type is
p-type..]. .Iadd.11. A circuit for rotating a multibit input binary word in either a first or a second direction comprising: (a) control means, adapted to receive a plurality of scale factor signals and to receive a direction control signal, for providing a plurality of shift control signals which are respectively the complement of the scale factor signals when the direction control signal has a first binary value and which are respectively the same as the scale factor signals when the direction control signal has a second binary value; (b) multi-bit-position rotate means, adapted to receive input data that are representative of the multibit input binary word, comprising (1) one-bit-position rotate means, adapted to receive the input data and the direction control signal, for rotating data by one bit position in the first direction when the direction control signal has the first binary value and for providing data without rotation when the direction control signal has the second binary value; and (2) unidirectional rotate means, connected to the one-bit-position rotate means so as to receive data therefrom and connected to the control means so as to receive the plurality of shift control signals therefrom, for rotating data in the first direction by a number of bit positions specified by the shift control signals, whereby output data of the unidirectional rotate means are representative of the input word rotated according to the scale factor signals and the
direction control signal. .Iaddend. .Iadd.12. The circuit of claim 11 comprising (a) input means, adapted to receive the multibit input binary word, for providing the input data which are representative of the input word; and (b) output means, adapted to receive the output of the multi-bit-position rotate means, for providing the rotated input word in accordance with the scale factor signal and the direction control signal. .Iaddend. .Iadd.13. The circuit of claim 12 in which the input means comprises a first array of inverters, one for each bit of the multibit input word, for inverting each bit of the input word to produce the input data which are representative of the input word, and in which the output means comprises a second array of inverters, one for each bit of the rotated input word, for inverting each bit of the output of the multi-bit-position rotate
means. .Iaddend. .Iadd.14. A shift/rotate circuit for shifting an N-bit input binary word in a first direction and for rotating the binary word in either the first or a second, opposite direction comprising: control means, adapted to receive a plurality of scale factor signals and a direction control signal, for providing a plurality of shift control signals which are respectively the complement of the scale factor signals when the direction control signal has a first binary value and which are respectively the same as the scale factor signals when the direction control signal has a second binary value; one-bit-position rotate means, adapted to receive input data which are representative of the N-bit binary word and to receive the direction control signal, for rotating the input data by one bit position in the first direction when the direction control signal has the first value, and for providing the input data without rotation when the direction control signal has the second value; and unidirectional shift/rotate means, connected to the control means so as to receive the plurality of shift control signals therefrom, connected to the one-bit-position rotate means so as to receive data therefrom, and adapted to receive a rotate control signal, for rotating in the first direction the data from the one-bit-position rotate means by the total number of bit positions specified by the shift control signals when the rotate control signal has a third binary value, and for shifting in the first direction the data from the one-bit-position rotate means by the total number of bit positions specified by the shift control signals when the rotate control signal has a fourth binary value, whereby output of the unidirectional shift/rotate means is representative of the input word shifted or rotated according to the scale factor signals, the direction control signal, and
the rotate control signal. .Iaddend. .Iadd.15. The circuit of claim 14 further comprising (a) input means, adapted to receive the input word, for providing the input data which are representative of the input word; and (b) output means, adapted to receive the output of the unidirectional shift/rotate means, for providing the input word rotated or shifted according to the scale factor signals, the rotate control signal, and the direction control signal. .Iaddend. .Iadd.16. A shift/rotate circuit as recited in claim 14 wherein the unidirectional shift/rotate means comprise a plurality of ranked levels including a first and a last level, each ranked level being adapted to receive incoming data, a respective one of the shift control signals, and the rotate control signal, each ranked level being responsive to the rotate control signal and to a respective one of the shift control signals, for rotating or for shifting the incoming data, depending upon the value of the rotate control signal, by a predetermined number of bit positions, depending upon the ranked level, when the respective shift control signal has a binary fifth value and for providing the incoming data without shift or rotation when the respective shift control signal has a binary sixth value, each ranked level except the first being coupled to receive data from the immediately preceding level, the first ranked level being coupled to receive data from the one-bit-position rotate means, whereby the last ranked level provides the output that is representative of the input word shifted or rotated according to the scale factor signals, the rotate control signal, and the direction control signal. .Iaddend. .Iadd.17. The circuit of claim 16 further comprising (a) input means, adapted to receive the input word, for providing the input data which are representative of the input word; and (b) output means, adapted to receive the output of the last ranked level, for providing the input word rotated or shifted according to the scale factor signals, the rotate control signal, and the direction control
signal. .Iaddend. .Iadd.18. A shift-rotate circuit as recited in claim 17 wherein the one-bit-position rotate means comprises: N input conductors representing N bit positions including a first and a last bit position; N output conductors representing N bit positions including a first and a last bit position; a plurality of first switch means, a respective one coupled between each input conductor and a corresponding output conductor representing a like bit position for transferring data signals on the input conductors to the corresponding output conductors in response to the second binary value of the direction control signal; and a plurality of second switch means, a respective one coupled between each input conductor except the one representing the first bit position and an output conductor representing a bit position displaced by one position in the first direction from that represented by the input conductor, and a respective one coupled between the input conductor representing the first bit position and the output conductor representing the last bit position, the second switch means transferring a data signal from the input conductor to the output conductor coupled thereby in response to the first binary value of the direction control signal. .Iaddend. .Iadd.19. A shift/rotate circuit as recited in claim 18 wherein each level of the unidirectional shift/rotate means comprises: N input conductors representing N bit positions including a first and a last bit position; N output conductors representing N bit positions including a first and a last bit position; a plurality of third switch means, a respective one coupled between each input conductor and a corresponding output conductor of a like bit position for transferring data signals on the input conductors to the corresponding output conductors in response to the sixth binary value of the respective one of the shift control signal; a plurality of fourth switch means, a respective one coupled between each input conductor except the ones representing those bit positions which are less than a predetermined number of positions from the first bit position and an output conductor representing a bit position displaced by the predetermined number of positions in the first direction from that represented by the input conductor, the fourth switch means transferring a data signal from the input conductor to the output conductor coupled thereby in response to the fifth binary value of the respective one of the shift control signals; and one or more fifth switch means, a respective one coupled between each input conductor representing a bit position which is less than the predetermined number of positions from the first bit position and an output conductor representing a bit position circularly displaced by the predetermined number of bit positions in the first direction from that represented by the input conductor, the fifth switch means transferring a data signal from the input conductor to the output conductor coupled thereby in response to the rotate control signal. .Iaddend.Join the waitlist — get patent alerts
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