Proportional digital control for radio frequency synthesizers
Abstract
A proportional digital control system for radio frequency synthesizers using binary coded decimal control to a frequency synthesizer tunable in contiguous small interval increasing or decreasing steps throughout the frequency bandwidth range of operation. A fine tune dial switch circuit generates a two signal output with one a step count signal and the other an up-down control signal generated only upon rotation of the fine tuning dial and with the signal pulse rates thereof a direct function of the rate of fine tune dial turning. The up-down control signal is an up or down signal input to up-down pulse counting to BCD output circuits as determined by phase relation thereof to the step count signal and with the phase determined by direction of fine tune dial turning clockwise for up count and counterclockwise for down count. The up-down counters to BCD are in a chain circuit with carry over circuitry for up-down count transition from one digit location to another that in some equipments is paralleled by supplemental band switching circuits. The BCD outputs of the up-down counter chain circuits are applied to a frequency synthesizer circuit and to readout display device circuits.
Claims
exact text as granted — not AI-modifiedI claim:
1. In a proportional digital control system using binary coded decimal control for tuning radio frequency synthesizers: a switching signal control source with reference signal pulse output means .[.,.]. .Iadd.for producing a reference signal pulse waveform and .Iaddend.an up-down count signal pulse means .Iadd.for producing an up-down count pulse waveform, .Iaddend.with .Iadd.a change in count determined by said reference signal pulse waveform and the count direction, whether .Iaddend.up or down .[.count.]..Iadd., .Iaddend.determined by phase relation .Iadd.of said up-down count signal pulse waveform .Iaddend.to .[.the signal pulses of.]. said reference signal pulse .[.output means.]. .Iadd.waveform.Iaddend., and means for shifting .[.signal pulse.]. .Iadd.the .Iaddend.phase of said up-down count signal .[.means.]. .Iadd.pulse waveform .Iaddend.relative to .[.the.]. .Iadd.said .Iaddend.reference signal .[.pulses.]. .Iadd.pulse waveform.Iaddend.; a circuit chain of a plurality of up-down counter to binary coded decimal output circuit units connected to receive .Iadd.directly from said switching signal control source only the two said .Iaddend.reference signal .[.pulses.]. and .Iadd.the phase shiftable .Iaddend.up-down count signal .[.pulses.]. .Iadd.pulse waveforms.Iaddend., and with carry over interconnect between adjacent digit locations of said up-down counter circuit units; a frequency synthesizer with a BCD input frequency selector control circuit connected to the BCD output of said up-down counter circuit units; and a plurality of digit display devices with BCD signal input circuit means connected individually to receive the BCD output signals of the individual up-down counter circuit units of the respective digit locations.
2. The proportional digital control system of claim 1, wherein said switching signal control source is fine tune means initiating up or down count tuning of said frequency synthesizer in contiguous small interval frequency steps throughout the frequency bandwidth range of operation.
3. The proportional digital control system of claim 2, wherein said fine tune means includes a rotary member with a plurality of sensing circuit interrupting means; drive means for turning said rotary member in clockwise or counterclockwise rotation; first and second sense circuit path interrupting means, with said first sense circuit interrupting means generating .[.a pulse signal.]. .Iadd.said .Iaddend.reference .Iadd.signal pulse .Iaddend.waveform; and with said second sense circuit interrupting means generating .[.an up or a down .]. .Iadd.said up-down .Iaddend.count signal pulse waveform .[.as determined by phase relation with said pulse signal reference waveform.]..
4. The proportional digital control system of claim 3, wherein said first and second sense circuit path interrupting means are magnetic relay switches activated by a plurality of substantially equally spaced bar magnets mounted on said rotary member.
5. The proportional digital control system of claim 3, wherein said first and second sense circuit path interrupting means include two light source means and two light detector means in aligned relation, respectively, and for light to shine through said rotary member; and with said rotary member in the form of a rotatably mounted disc with uniformly spaced opaque slots and transparent areas.
6. The proportional digital control system of claim 3, wherein converter circuit means with switching signal pulse waveform shaping of both the reference signal and the up-down count signal pulse waveforms with said switching signal control source includes R-C time constant delay means with both signal paths through said converter circuit means for resolving any switching threshold transition irregularities.
7. The proportional digital control system of claim 3, wherein band switching circuit means is connected to said circuit chain of up-down counter units paralleling said carry over circuitry in at least one location in said circuit chain.
8. The proportional digital control system of claim 7, wherein said contiguous small interval frequency steps are 100 Hz steps; and a plurality of said up-down counter units are 0 to 9 and back to 0 count units with four wire BCD outputs.
9. The proportional digital control system of claim 8 wherein a first section of said band switching circuit means is connected at a 100 kHz band switching location in said circuit chain of up-down counter units; and a second section of said band switching circuit means is connected at a 1 MHz band switching location in said circuit chain of up-down counter units.
10. The proportional digital control system of claim 9, wherein the highest digit up-down counter to BCD output unit is a 0, 1 and 2 back to 0 count unit with two BCD output lines connected both to said BCD input frequency selector control circuit of the frequency synthesizer and to the BCD input circuit means of the digit display device at the highest digit location.
11. The proportional digital control system of claim 7, wherein a plurality of said up-down counter units are provided with independent four wire inputs as information input tracking response inputs to the respective up-down counter units; and an enable signal input to each of the plurality of said up-down counter units responsive, with signal voltage applied thereto from a control location, to enable the up-down counter units to a tracking mode responsively setting to the signals input via said independent four wire inputs respective to each up-down counter unit from a control location.
12. The proportional digital control system of claim 3, wherein each of said plurality of up-down counter units is connected to receive reference signal pulses and up-down count signal pulses; and carry over signal gating connected circuitry in said circuit chain of up-down counter units.Join the waitlist — get patent alerts
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