Vital relay driver having controlled response time

Abstract

A vital relay driver whose response time can be readily controlled such that the release time of the relay may be varied, yet may be held to very close tolerances. The vital relay driver is controlled by a microprocessor dedicated to this function, such processor generating a dynamic signal of fixed frequency in dependence on a cycle number which is continually replenished; otherwise the microprocessor stops producing the dynamic signal and the relay is released in a closely known time.

What is claimed is: 
     
       1. A system for providing a signal.Iadd., based on a time cycle .Iaddend.to a tuned vital driver so as selectively to hold up or sustain a vital relay, which is connected to the driver, for a variety of predetermined time intervals, .Iadd.corresponding to a required number of cycles, .Iaddend.comprising means for selectively generating each of the predetermined time intervals, said means including a digital microprocessor having one of its outputs connected to said tuned vital driver, said microprocessor generating a dynamic signal at said one output of fixed frequency and extending for a specified time interval so long as a cycle number is being continually replenished in the microprocessor in response to the presence of a safe condition;   a diversity means connected to the input of said microprocessor for selectively supplying, in response to differing safe conditions, both a respective check word and the complement of said check word as controlling inputs of said microprocessor for developing the required number of cycles for the dynamic output signal from said processor, whereby a respective time interval is generated during which the vital relay will be sustained;   a pair of registers within said microprocessor for storing a pair of time numbers corresponding to said check word and its complement, said time numbers representing the selected time interval during which the vital relay is to be sustained;   means for continuously and repetitively decrementing the time number values in said registers;   a cycle checking means .Iadd.located in said microprocessor .Iaddend.for continuously and repetitively checking on the programmed operations of said microprocessor.   
     
     
       2. Apparatus as defined in claim 1, in which a table read-only memory provides time numbers corresponding with the check word and its complement so as to determine the relay sustain time. 
     
     
       3. Apparatus as defined in claim 2, in which said time numbers corresponding with the check word and its complement have a predetermined relationship. 
     
     
       4. Apparatus as defined in claim 3, in which said time numbers differ by one. 
     
     
       5. Apparatus as defined in claim 2, in which said time numbers are stored in two locations, one location being in said pair of registers, the other being in a random access memory. 
     
     
       6. Apparatus as defined in claim 1, further including .Iadd.a pair of outputs for said microprocessor, and .Iaddend.back check means .Iadd.connected to said pair of outputs .Iaddend.for verifying that the time cycle is not running. .Iadd. 7. A system for providing a signal, based on a time cycle, to a vital driver so as selectively to hold up or sustain a vital output for one of a variety of predetermined time intervals, corresponding to a required number of cycles, comprising: means for generating the selected predetermined time interval, said means including a digital processor having one of its outputs connected to said tuned vital driver, said processor generating a dynamic signal at said one output of fixed frequency and extending for a specified time interval so long as a cycle number is being continually replenished in the processor in response to the presence of a safe condition;   a diversity means connected to the input of said processor for selectively supplying, in response to differing safe conditions, both a respective check word and a complement of said check word as controlling inputs of said processor for developing the required number of cycles for the dynamic output signal from said processor, whereby a respective time interval is generated during which the vital output will be sustained;   a pair of registers within said processor for storing a pair of time numbers corresponding to said check word and its complement, said time numbers representing the selected time interval during which the vital output is to be sustained;   means for continuously and repetitively changing by a predetermined amount the time number values in said registers;   a cycle checking means, located in said processor, for continuously and repetitively checking on the programmed operations of said processor. .Iaddend. .Iadd. 8. Apparatus as defined in claim 7, in which a table read-only memory provides time numbers corresponding with the check word and its complement so as to determine the sustain time of the output. .Iaddend..Iadd. 9. Apparatus as defined in claim 8, in which said time numbers corresponding with the check word and its complement have a predetermined relationship. .Iaddend..Iadd. 10. Apparatus as defined in claim 7, in which said time numbers are the check words. .Iaddend. .Iadd. 11. Apparatus as defined in claim 7, further including a pair of outputs for said processor, back check means connected to said pair of outputs for verifying that the time cycle is not running. .Iaddend.