Process and product for making a single supply N-channel silicon gate device

Abstract

A process is described wherein an N-channel silicon gate device operates from a single voltage supply. This process includes an ion implantation step into the gate region of both the load and switch devices for adjusting upwards the threshold voltage of such N-channel silicon gate load and switch devices. This ion implantation of the gate region utilizes the dosage and ion implant energy as factors in determining the change in the threshold voltage. The ion implantation is in a region essentially at the surface of the gate region and as such appears to be a change in the Q ss term of the device. The effect of the ion implantation is to increase upwards the threshold voltage of the structure as compared with the expected threshold voltage based on the resistivity level of the starting material of the wafer. The overall effect of this process is to provide an active device having a higher output voltage than can be expected from using the starting resistivity material. The output voltage is approximately 25% greater using this process because the body effect turns out to be much lower in the present process than in the prior art process.

What is claimed is: 
     
       1. A process for .[.increasing the threshold voltage of an.]. .Iadd.fabricating an inverter including serially .Iaddend.connected N-channel MOS devices .Iadd.in a semiconductor substrate .Iaddend.comprising the step of: implanting acceptor ions .[.of one conductivity type.]. into the channel .Iadd.regions of both devices at the .Iaddend.surface portion of a .Iadd.P-type .Iaddend.semiconductor body .[.having source and drain regions of the opposite type conductivity.]. at an energy level and in an amount sufficient to increase the threshold voltage of said MOS .[.device.]. .Iadd.devices.Iaddend..   
     
     
       2. The process as recited in claim 1 wherein the acceptor ions are selected from the group of boron and gallium. 
     
     
       3. The process as recited in claim 1 wherein boron is used as the acceptor ions. 
     
     
       4. The process as recited in claim 1 wherein the semiconductor body has a resistivity range of about 10 to 45 ohm centimeter material. 
     
     
       5. A process for .[.increasing the threshold voltage of a.]. .Iadd.fabricating an inverter including serially connected .Iaddend.MOS .[.device.]. .Iadd.devices .Iaddend.having source and drain regions of one conductivity type and a channel position .[.in.]. .Iadd.at the surface of .Iaddend.a semiconductor body comprising the step of: implanting ions of opposite conductivity type to said source and drain regions into the channel surface .[.portion.]. .Iadd.portions .Iaddend.of the semiconductor body at an energy level and in an amount sufficient to increase the threshold voltage of said MOS .[.device.]. .Iadd.devices.Iaddend..   
     
     
       6. The process of claim 5 in which the ion implantation is carried out within about the upper 10,000A of said substrate member. 
     
     
       7. The process of claim 6 in which said ion implantation step is made with an implant energy within the range of about 10 KEV to 70 KEV. 
     
     
       8. The process of claim 7 in which said ion implanting step is made with an implant dosage lying within the range of about 2 × 10 11  to about 8 × 10 11  impurities/cm 2 . 
     
     
       9. A process for .[.increasing the threshold voltage of an.]. .Iadd.series connected .Iaddend.MOS .[.device.]. .Iadd.devices on a semiconductor substrate, said devices .Iaddend.having source and drain regions of one conductivity type and .[.a.]. channel .[.portion.]. .Iadd.portions .Iaddend.in a semiconductor body, .Iadd.and having only one of said source and drain regions connected directly to said substrate, .Iaddend.which comprises: forming a surface passivation layer over said channel .[.portion.]. .Iadd.portions .Iaddend.in a thickness that will allow implantation of ions at the surface of said channel .[.portion.]. .Iadd.portions .Iaddend.in a concentration sufficient to increase the threshold voltage of the MOS .[.device,.].  .Iadd.devices; .Iaddend.and   ion implanting ions of opposite conductivity type to said source and drain regions through said surface passivation layer into the surface portion of said channel .[.portion.]. .Iadd.portions .Iaddend.at an energy level and in an amount sufficient to increase the threshold .[.voltage.]. .Iadd.voltages .Iaddend.of said MOS device.   
     
     
       10. The process of claim 9 wherein said passivation layer is an oxide and has a thickness no greater than about 10,000A. 
     
     
       11. The process of claim 10 wherein the ion implantation is carried out within about the upper 10,000A of said substrate member. 
     
     
       12. A process for increasing the threshold voltage of an N-channel silicon gate device; providing a starting substrate member having a resistivity lying within the range of 10 to 45 ohm centimeter;   forming a surface passivation layer no greater than 10,000A thick; and   implanting boron ions within the upper 10,000A of the substrate member.   
     
     
       13. A process for increasing the threshold voltage of an N-channel silicon gate device as recited in claim 12, wherein: said ion implanting step is made with an implant energy of 35,000 electron volts.   
     
     
       14. A process for increasing the threshold voltage of an N-channel silicon gate device as recited in claim 12, wherein: said ion implanting step is made with an implant dosage of 2 × 10 11  /cm 2 .   
     
     
       15. A process for increasing the threshold voltage of an N-channel silicon gate device as recited in claim 12, wherein: said ion implanting step is made with an implant dosage lying within the range of 2 × 10 11  to 8 × 10 11  impurities/cm 2 .   
     
     
       16. A process for increasing the threshold voltage of an N-channel silicon gate device as recited in claim 12, wherein: said ion implanting step is made with an implant energy lying within the range of 10 KEV to 70 KEV.