Hologram graphic data tablet apparatus using a vernier

Abstract

A hologram graphic tablet apparatus is described which has an improved resolution. The apparatus includes a hologram plate which includes a plurality of mini-holograms having position code data therein. The hologram plate is sequentially illuminated by a reference laser and an array of vernier lasers. The light from the laser that is diffracted by the mini-holograms is detected to form a reconstructed image of the position data, and the detected information is processed to produce a positional code that has a greater number of bits, and hence greater position resolution, than that directly obtained from the mini-hologram, depending on whether the output codes from the detector are the result of irradiation of the mini-hologram by the reference laser or by the vernier laser array.

What is claimed is: 
     
       1. A hologram graphic data tablet apparatus comprising a hologram plate having a plurality of position-representing mini-holograms recorded thereon, a reference laser, an array of n or (n-1) vernier lasers arranged at an interval of (n-1)/n of the width of one of said mini-holograms, means for energizing said reference and said vernier lasers in a predetermined time sequence, means for detecting the light rays emitted by said lasers and diffracted at said mini-holograms forming a reconstructed image, and means for processing the output of said detecting means to produce a positional code having a greater number of bits than the positional code obtained directly from said mini-holograms depending on whether the output codes from said detecting means are the result of irradiation by said reference laser or by said vernier laser array. 
     
     
       2. The hologram tablet apparatus of claim 1, in which said processing means includes a most significant bit counter coupled to said detecting means for receiving the position code, a second counter also receiving the position code, and a comparator for comparing the position code and the contents of said second counter and for producing a gating signal upon their coincidence. 
     
     
       3. The hologram tablet apparatus of claim 2, further comprising a least significant bit counter, a control signal generator for developing control signals for controlling the energizing of said lasers and a carry pulse for said least significant bit counter, and gating means for applying said carry pulse to said least significant bit counter upon the presence of said gating signal. 
     
     
       4. A hologram graphic data tablet apparatus comprising a hologram plate having a plurality of position-representing and boundary region-discriminating mini-holograms recorded thereon in columns and lines, an optical scanning member having an array of n first lasers arranged at an interval of (n-1)/n of one mini-hologram and a second laser disposed in the middle of a preselected pair of said first lasers, a drive circuit for energizing said first and second lasers in a predetermined time sequence, a counter circuit for indicating which one of said lasers is energized, first means for detecting a first reconstructed holographic image created by the irradiation by said lasers of said mini-holograms for determining the positional data recorded in the irradiated mini-hologram, second means for detecting a second reconstructed holographic image in a manner similar to said first detecting means for determining the adjacent-mini-hologram discriminating data, and means for comparing the intensities of two reconstructed images for discriminating adjacent mini-holograms from each other on each orthogonal coordinate, whereby the positional data and the adjacent-mini-hologram discriminating data are generated from the mini-hologram for obtaining a positional code with enhanced resolving power. 
     
     
       5. The hologram data tablet apparatus of claim 4, further comprising a register having a most significant bit stage and a least significant bit stage, means for storing the output of said first detecting means in said most significant bit stage, and gating means for applying the contents of said counter circuit to said least significant bit stage.