Digital filter for a digital demodulation receiver

Abstract

A digital filter comprising an up-down counter conditioned by a signal indicative of whether an input periodic oscillation signal is of a frequency representing a binary 1 or a binary 0, to count in one direction to a threshold count for an input 1, and to count in the other direction to a threshold count for an input 0 is disclosed. Additional, a crystal controlled oscillator provides the pulses by which the up-down counter counts in a direction determined by the conditioning signal. The conditioning signal is provided by a storage flip-flop which is conditioned by an indicia signal flip-flop from the demodulation receiver.

We claim: 
     
       1. In a digital demodulation receiver for receiving an input periodic oscillation signal of a first frequency, designated a binary 1, and of a second frequency, designated a binary 0, and for providing indicia signals representative of whether the signals are of the 1 or 0 frequency, a digital filter comprising: a. clock pulse means for producing pulses at a prescribed frequency;   b. storage means, receiving the indicia signals, for providing a first output signal substantially continuously in the presence of 1 input signal, and a second output signal substantially continuously in the presence of a 0 input signal; and   c. up-down counting means connected to the clock pulse means and to the storage means, for receiving pulses from the clock pulse means as conditioned by the first output signal from the storage means to count in one direction to a first threshold count, and as conditioned by the second .Iadd.output signal from the .Iaddend.storage means to count in the other direction to a second threshold count.   
     
     
       2. The digital filter of claim 1 wherein the clock pulse means further comprise a crystal controlled oscillator. 
     
     
       3. The digital filter of claim 2 wherein the prescribed frequency is higher than the first or second frequency. 
     
     
       4. The digital filter of claim 2 wherein the storage means further comprise a flip-flop, set by an indicia signal representative of a 0 input signal and reset by an indicia signal representative of a 1 input. 
     
     
       5. The digital filter of claim 4 wherein the prescribed frequency is higher than the first or second frequency. 
     
     
       6. The digital filter of claim 1 wherein the storage means further comprise a flip-flop, set by an indicia signal representative of a 0 input signal and reset by an indicia signal representative of a 1 input. 
     
     
       7. The digital filter of claim 6 wherein the prescribed frequency is higher than the first or second frequency.