Packaged semiconductor device for microwave use

Abstract

A packaged semiconductor device for use at ultra-high frequencies is characterized by improved high frequency characteristics as a result of reduced stay capacitance and reduced energy loss. The device includes a dielectric substrate and at least two conductor layers each of which is integral and extends over the top, side, and bottom surfaces of the dielectric substrate. No part of the conductor layer on the top surface overlaps the part on the bottom surface when viewed in a direction normal to the substrate.

What is claimed is: 
     
       1. A packaged semiconductor device for use in the microwave frequency region, comprising a flat rectangular substrate of a dielectric material having substantially parallel top and bottom surfaces, first, second, third and fourth conductive layers formed on said substrate, a transistor element operable in the microwave frequency region, each of said layers having a first part formed on said top surface, a second part formed on said side surface, and a third part formed on said bottom surface, said first, second and third parts being electrically connected with each other, first, second and third parts of said first conductive layer extending along and over the entire length of one side of said substrate, the first, second, and third parts of said second conductive layer extending along and over the entire length of the opposite side of said substrate to said one side and in parallel with said first, second and third parts of said first conductive layer, respectively; the first, second and third parts of said third and fourth conductive layers being arranged respectively between said first, second and third parts of said first conductive layer and said first, second and third parts of said second conductive layer and extending in parallel with said first and second conductor layers, first parts of said third and fourth conductive layers being arranged in line, third parts of said third and fourth conductive layers being arranged in line, the first part of each conductive layer overlapping only with its own third part when viewed in a direction normal to said substrate; the collector of said transistor element being connected to said first part of said third conductive layer, the base of said transistor element being connected to said first part of said fourth conductive layer, and the emitter of said transistor element being connected to said first parts of said first and second conductive layers; and lead-out conductors respectively connected to said third parts of said first, second, third, and fourth conductive layers. 
     
     
       2. A semiconductor device as claimed in claim 1, wherein said dielectric substrate is made of ceramic material. 
     
     
       3. A semiconductor device as claimed in claim 1, wherein said dielectric substrate is made of alumina ceramic. 
     
     
       4. A semiconductor device as claimed in claim 1, wherein said lead-out wires are soldered onto said third parts, respectively, said solder adhering also to said second part, whereby each of the electrical paths from said first part to said lead-out wire has a bent portion between said second part and said lead-out wire forming an angle greater than 90° due to the soldering material. 
     
     
       5. A semiconductor device as claimed in claim 1, further comprising a wall member of ceramic material disposed on said top surface and said first parts of said conductor layers; and a covering member disposed on said wall member for hermetically sealing said semiconductor element. 
     
     
       6. A semiconductor device as claimed in claim 5, wherein said wall member is made of alumina.