USRE28952EExpiredUtility
Shaped riser on substrate step for promoting metal film continuity
Est. expiryMar 17, 1991(expired)· nominal 20-yr term from priority
Inventors:Andrew G. F. Dingwall
H10P 14/69215H10W 20/40H10P 95/00
31
PatentIndex Score
1
Cited by
9
References
11
Claims
Abstract
In integrated circuit devices which have insulating coatings with portions of different thickness bounded by relatively high steps and deposited metal conductors on the coatings, yield losses often result from breaks in the metal conductors at the steps. By shaping the insulator step with an offset wherever a metal crossing is required, the probability of such breaks is reduced.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1. A semiconductor device of the type which includes a metal layer on and adhered to a substrate, said substrate having first and second spaced parallel surfaces connected by a riser surface defining a relatively high step, .Iadd.said substrate comprising a silicon body having an insulating silicon dioxide coating thereon, said silicon dioxide coating having thick and thin portions, said first and second parallel surfaces being a surface of said thin portion of said coating and a surface of said thick portion of said coating respectively, and said riser surface being a surface of said thick portion of said coating, said riser surface being generally elongated in a given direction, .Iaddend.said metal layer extending from said first of said parallel surfaces over said riser surface to said second of said parallel surfaces, .Iadd.said metal layer having the form of an elongated strip with parallel sides, the direction of elongation of said metal layer being at an angle to that of said riser surface, .Iaddend.said riser surface of said step being substantially perpendicular to each of said first and said second parallel surfaces, in which at the location where said metal layer extends from said first to said second surface and within the boundaries of said metal layer, said riser surface has at least two non-coplanar portions, each of which extends from said first parallel surface to said second parallel surface.
2. A device as defined in claim 1 wherein said two portions of said riser surface lie in spaced, parallel planes .[.effect.]..
3. A device as defined in claim 2 wherein said two portions are joined by a third portion of said riser surface which lies in a plane perpendicular to those of said two portions.
4. A device as defined in claim 3 wherein .[.said metal layer has the form of an elongated strip with parallel sides,.]. each side .[.being.]. .Iadd.of said metal layer is .Iaddend.substantially parallel to the plane of said third portion and substantially perpendicular to the planes of said two portions of said riser surface. .[.
5. A device as defined in claim 1 wherein said substrate comprises a silicon body having an insulating silicon dioxide coating thereon, said coating having thick and thin portions, said first and second spaced parallel surfaces being surfaces of said portions of said insulating coating..].
6. A device as defined in claim .[.5.]. .Iadd.1 .Iaddend.wherein the space between said surfaces of said insulating coating is greater than about 1.7 micrometers.
7. A device as defined in claim 6 wherein said two portions of said riser surface occupy spaced, parallel planes.
8. A device as defined in claim 7 wherein said two portions are joined by a third portion of said riser surface which occupies a plane perpendiculr to those of said two portions.
9. A device as defined in claim 8 wherein said metal layer has the form of an elongated strip with parallel sides, each side being substantially parallel to the plane of said third portion and substantially perpendicular to the planes of said two portions of said riser surface.
10. A device as defined in claim 9 wherein said device includes a plurality of insulated gate field effect transistors, the thin portions of said insulating coating constituting gate insulators for said insulated gate field effect transistors and being about 1000 A thick, the thick portions of said insulating coating being greater than about 1.8 micrometers thick. .[.
11. A semiconductor device of the type which includes a metal layer on and adhered to a substrate, said substrate having first and second spaced parallel surfaces connected by a riser surface defining a relatively high step, said metal layer extending from said first of said parallel surfaces over said riser surface to said second of said parallel surfaces, said riser surface of said step being substantially perpendicular to each of said first and second parallel surfaces, in which at the location where said metal layer extends from said first to said second surface, and within the boundaries of said metal layer, said riser surface has at least two non-coplanar portions in the form of intersecting flat planes, the line of intersection between said flat planes being transverse to said first and second parallel surfaces..].Join the waitlist — get patent alerts
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