Analogue to digital converter

Abstract

In an analogue to digital converter the unknown voltage is applied continuously to an integrating circuit during each conversion period. An opposing reference voltage is switched on and off to cause the amplifier output to ramp up and down between two detection levels. One or both of these levels varies as a periodic function of time, e.g. a sawtooth waveform. Clock pulses are counted when the slope of the output ramp is of one sign only and it is shown that the ratio of the unknown voltage to the reference voltage is simply related to the number of clock pulses actually counted when the slope is of said one sign and the total number of clock pulses occurring during the conversion period.

What is claimed is: 
     
       1. An ADC comprising in combination: integrating means having an input and an output, means for applying a first electrical signal continuously throughout a measurement period to the input of said integrating means, a circuit means having two states for applying a second electrical signal opposing said first signal to the integrating means input when in one of said two states, said integrating means being responsive to the application of said first and second signals to produce an output signal at the integrating means output which ramps up and down during said measurement period as the states of said circuit means alternate, level detection means responsive to two different levels of said output signal to cause said circuit to switch alternatively to the two states thereof when the said two levels are respectively reached by said output signal, signal generator means for applying a variable waveform signal to said level detection means to cause at least one of said detection levels to vary in accordance with a predetermined function independent of the magnitude of said first electrical signal, and a clock pulse generator and counter means for counting clock pulses from said clock pulse generator while said circuit means is in one of said two states, whereby the pulses counted by said counter means are representative of the magnitude of the first electrical signal. 
     
     
       2. An ADC according to claim 1, wherein said signal generator means cause one of said detection levels to vary as a periodic function of time. 
     
     
       3. An ADC according to claim 1, wherein said signal generator means cause both said detection levels to vary as co-periodic functions of time. 
     
     
       4. An ADC according to claim 1, wherein said signal generator means cause at least one of said detection levels to vary as a periodic, linear function of time. 
     
     
       5. An ADC according to claim 1, wherein said signal generator means cause at least one of said detection levels to vary as a periodic function of time which is periodically equal in amplitude to the other detection level. 
     
     
       6. An ADC according to claim 5, wherein said signal generator means cause said two detection levels to converge continuously throughout each period and to diverge from equality abruptly at the transition from one period to the next. 
     
     
       7. An ADC according to claim 6, wherein at least one of said detection levels follows a linear sawtooth waveform. 
     
     
       8. An ADC according to claim 5, wherein said signal generator means cause said two detection levels to diverge continuously throughout each period and to converge to equality abruptly at the transition from one period to the next. 
     
     
       9. An ADC according to claim 8, wherein at least one of said detection levels follows a linear sawtooth waveform. 
     
     
       10. An ADC according to claim 1, wherein said signal generator means operate periodically to cause at least one of said detection levels to vary as a periodic function of time, and wherein said signal generator means and said clock pulse generator are synchronized. 
     
     
       11. An ADC according to claim 1, wherein said signal generator means operate periodically to cause at least one of said detection levels to vary as a periodic function of time and to reset said counter means to zero once in every period. 
     
     
       12. An ADC according to claim 11, wherein it is arranged that each period commences with an interval in which said circuit means having two states is in that state in which clock pulses are not counted and wherein said counter means is reset during this interval but a sufficient time after the beginning of the period to allow the count accumulated in the previous period to be displayed or read out. 
     
     
       13. An ADC comprising in combination: integrating means having an input and an output, level detection means responsive to and arranged to detect first and second distinct levels of an output signal at the integrating means output, a bistable device controlled by said level detection means to assume first and second states when said first and second levels are respectively attained by said output signal, means for applying an unknown electrical signal continuously throughout a measurement period to the integrating means input to cause said output signal to move from said second level to said first level when said unknown signal is the only signal applied to said input, a source of a reference signal opposing said unknown signal and responsive to the state of said bistable device to apply said reference signal to said integrating means input only while said bistable device is in said first state to cause said output signal to move from said first level to said second level, a clock pulse generator and a counter controlled by said bistable device to count clock pulses only while said bistable device is in said first state, a periodic sawtooth generator for generating waveforms of substantially sawtooth shape independent of the magnitude of said unknown signal, said periodic sawtooth generator being synchronized to said clock pulse generator such that the sawtooth waveform period at least equals a plurality of clock pulse periods, at least one of said first and second levels being provided as a sawtooth function by said sawtooth generator, whereby the total of the pulses counted by said counter when said bistable device is in said first state is representative of the magnitude of said unknown electrical signal. 
     
     
       14. An ADC according to claim 13, comprising means for resetting said counter to a predetermined count a predetermined interval of time after the beginning of each sawtooth period while said bistable device is still in said second state. 
     
     
       15. An ADC according to claim 13, wherein both said detection levels are provided as sawtooth functions of different amplitude by said sawtooth generator, said functions converging to equality during each sawtooth period and diverging on flyback of the sawtooth generator. 
     
     
       16. An analog to digital converter comprising integrating means; means for applying an input signal to said integrating means to be integrated; first means for establishing a first reference level and for producing a first control signal when the integrated input signal reaches said first reference level; second means for establishing a second reference level for producing a second control signal when the integrated input signal reaches said second reference level; means for causing at least one of said first and second reference levels to periodically vary in magnitude independent of the magnitude of said input signal; means responsive to one of said first and second control signals for including, with said input signal as an input to said integrator, a known signal component of a polarity and magnitude to cause the integrated signal to reverse its slope, and to the other of said first and second signals for removing said known signal component; and means for measuring the intervals of time during which said known signal component is being integrated within an integral number of periods of variation of said at least one reference level, whereby the intervals of time measured by said means for measuring are representative of the magnitude of said input signal.