Method of manufacturing a semiconductor device

Abstract

A method of making a field effect transistor in which a gate electrode is provided on a semiconductor layer and then the surface subjected to electron or ion bombardment to form the source and drain electrodes on opposite sides of the gate, acting as a mask, and spaced apart by the width of the gate.

What is claimed is: 
     
       1. A method of manufacturing a semiconductor device comprising at least one field-effect transistor having source, drain and gate electrodes coupled to a semiconductor layer, .[.comprising providing on a surface of a semiconductor layer,.]. comprising providing on a surface of a semiconductor layer at least part of a gate electrode in a thickness capable of blocking impinging ions or electrons leaving exposed semiconductor surface portions on opposite sides of the gate, subjecting the said gate and the said exposed surfaces of the semiconductor layer on opposite sides of the provided gate electrode to ion or electron bombardment to modify the conductivity of the exposed semiconductor surface portions while the said gate blocks the underlying surface portions from receiving said bombardment, and providing on the said surfaces of modified conductivity and spaced from the gate electrode ohmic contacts to form source and drain contacts, the surfaces of modified conductivity forming source and drain electrodes spaced apart by the width of the gate electrode in the completed device. 
     
     
       2. A method as claimed in claim 1, characterized in that the gate electrode is provided by using a photoresist method. 
     
     
       3. A method of manufacturing a semiconductor device comprising at least one field-effect transistor having source, drain and gate electrodes coupled to a semiconductor layer, comprising providing on a substrate a layer of semiconductive material, providing on a surface of the semiconductor layer remote from the substrate an insulating layer and on the insulating layer at least part of a gate electrode in a thickness capable of blocking impinging ions or electrons leaving exposed semiconductor surface portions on opposite sides of the gate, subjecting the said gate and the said exposed surfaces of the semiconductor layer on opposite sides of the provided gate electrode to ion or electron bombardment, until the said exposed surfaces exhibit increased conductivity while the said gate blocks the underlying surface portions from receiving said bombardment, and providing on the said surfaces of increased conductivity and spaced from the gate electrode ohmic contacts of a material selected from the group consisting of gold, platinum and nickel-chromium alloy to form source and drain contacts, the surfaces of increased conductivity forming source and drain electrodes spaced apart by the width of the gate electrode in the completed device. 
     
     
       4. A method as claimed in claim 3, characterized in that the semiconductor layer is cadmium sulphide. 
     
     
       5. A method as claimed in claim 3, characterized in that an ion bombardment is used in the form of a gas discharge between the semiconductor layer and a further electrode. .Iadd. 6. A method of manufacturing an insulated gate field effect transistor comprising forming on a semiconductor body surface an insulating layer and on the latter a gate electrode layer, and using the insulated gate electrode structure as a bombardment mask ion bombarding the semiconductor body surface to form therein adjacent the semiconductor surface source and drain electrode region portions spaced apart by the bombardment-masked surface region below the insulated gate electrode structure. .Iaddend..Iadd. 7. A method as claimed in claim 6 wherein at the surface the semiconductor body is of one conductivity type and ion bombardment is effected to form source and drain electrode region portions of the opposite conductivity type. .Iaddend..Iadd. 8. A method as claimed in claim 7, wherein the transistor formed is a MOST-type transistor. .Iaddend..Iadd. 9. A method of fabricating an insulated gate field effect device comprising the steps of forming an insulated gate electrode member on a portion of the surface of a semiconductor body, and causing ions productive of conductivity type inversion to impinge on said surface, whereby more strongly conductive regions of like conductivity types are established in the semiconductor body adjacent and spaced apart by a less-strongly conductive body region of the opposite conductivity type under the insulated gate electrode member. .Iaddend..Iadd. 10. A method of making a field-effect transistor comprising providing an insulated gate electrode on a body comprising a semiconductor leaving exposed surface regions of the body on opposite sides of the gate electrode, subjecting the body to electron or ion bombardment incapable of penetrating the gate electrode which thereby masks the underlying semiconductor surface but capable of reaching and impinging on to modify the conductivity of the semiconductor surface regions on opposite sides of the gate electrode to form thereat in the semiconductor source and drain electrodes spaced precisely apart by the width of the gate electrode and not overlapped by the bombardment masking gate. .Iaddend..Iadd. 11. A method as set forth in claim 10 wherein the gate electrode is formed using a photoresist method. .Iaddend..Iadd. 12. In the method of making an insulated-gate field-effect transistor having a body comprising a semiconductor having adjacent a surface spaced source and drain electrodes separated by a region with an insulated gate electrode on the semiconductor surface over the said region and source and drain contacts to the source and drain electrodes respectively, the source and drain contacts being spaced from the said region, the improvement comprising forming an insulated-gate electrode on the semiconductor surface portion overlying the said region and substantially coextensive with the said region, and thereafter causing ions to impinge on the surface of the semiconductor containing the insulated gate electrode to modify the conductivity of the semiconductor surface regions on opposite sides of the insulated gate to establish source and drainn electrodes directly adjacent the said region under the insulated gate electrode, said insulated gate electrode having a thickness capable of blocking the impinging ions thereby masking the said underlying region against the effect of the impinging ions. .Iaddend.