Semiconductor device

Abstract

One semiconductor device includes a wiring substrate, a semiconductor chip, and a sealing body. The wiring substrate includes an insulating base material, a first conductive pattern formed on one surface of the insulating base material, and a second conductive pattern formed on one surface of the insulating base material, connected to the first conductive pattern and having an end face exposed to the side. The semiconductor chip is mounted on the wiring substrate so as to overlap with the first conductive pattern. The sealing body is formed on the wiring substrate so as to cover the semiconductor chip.

What is claimed is: 
     
       1. A semiconductor device comprising:
 a wiring substrate having an insulating base material, a first conductive pattern formed on a first surface of the insulating base material, and a second conductive pattern formed on the first surface of the insulating base material, connected to the first conductive pattern, and exposed to the side at an end face; 
 a semiconductor chip mounted on the wiring substrate so as to overlie the first conductive pattern; and 
 a sealing body formed on the wiring substrate so as to cover the semiconductor chip. 
 
     
     
       2. The semiconductor device as claimed in  claim 1 , wherein the wiring substrate has an insulating film formed on the first surface of the insulating base material so as to cover the first conductive pattern and expose the second conductive pattern. 
     
     
       3. The semiconductor device as claimed in  claim 1 , wherein a plating layer is disposed on the surface of the second conductive pattern. 
     
     
       4. The semiconductor device as claimed in  claim 1 , wherein the first conductive pattern is connected to the second conductive pattern by a connection wiring. 
     
     
       5. The semiconductor device as claimed in  claim 1 , wherein the wiring substrate has a connection pad, and the insulating film has an opening located opposite the connection pad; and
 the first conductive pattern is connected to the connection pad. 
 
     
     
       6. A semiconductor device comprising:
 a wiring substrate having an insulating base material, and a wiring pattern and a connection pad formed on a first surface of the insulating base material; 
 a semiconductor chip mounted on the wiring substrate so as to overlie the wiring pattern; and 
 a sealing body formed on the first surface of the wiring substrate so as to cover the semiconductor chip; 
 wherein a portion of the wiring pattern comprises a first conductive pattern connected to the connection pad, and a second conductive pattern connected to the first conductive pattern and exposed to the side at an end face. 
 
     
     
       7. A semiconductor device comprising:
 an upper package having:
 a wiring substrate having an insulating base material, a first conductive pattern formed on a first surface of the insulating base material, and a second conductive pattern formed on the first surface of the insulating base material, connected to the first conductive pattern, and exposed to the side at an end face; 
 a semiconductor chip mounted on the wiring substrate so as to overlie the first conductive pattern; 
 a sealing body formed on the wiring substrate so as to cover the semiconductor chip; and 
 metal balls disposed on a second surface of the wiring substrate along each side of the wiring substrate in a region excluding a central region of the wiring substrate; and 
 
 a lower package having a wiring substrate comprising an insulating base material, a semiconductor chip mounted on a first surface of the wiring substrate, and metal balls mounted on a second surface of the wiring substrate; 
 wherein the upper package and the lower package are stacked so that the metal balls of the upper package do not contact the semiconductor chip of the lower package, and contact the wiring substrate of the lower package. 
 
     
     
       8. The semiconductor device as claimed in  claim 7 , wherein connection lands are disposed on the first surface of the wiring substrate of the lower package, and the metal balls of the upper package are connected to the connection lands of the lower package.