Quantum doping method and use in fabrication of nanoscale electronic devices
Abstract
A novel doping technology for semiconductor wafers has been developed, referred to as a “quantum doping” process that permits the deposition of only a fixed, controlled number of atoms in the form of a monolayer in a substitutional condition where only unterminated surface bonds react with the dopant, thus depositing only a number of atoms equal to the atomic surface density of the substrate material. This technique results in providing a “quantized” set of possible dopant concentration values that depend only on the additional number of layers of substrate material formed over the single layer of dopant atoms.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1. A method of performing controlled doping of a semiconductor material, the method performed in a reaction chamber and comprising the steps of:
a) providing a substrate of a semiconductor material of a predetermined crystallographic orientation and having a top major surface;
b) atomically cleaning the top major surface of the substrate to remove impurities and expose a fixed number of unterminated bonds of surface atoms as controlled by the predetermined crystallographic orientation and surface area of the top major surface, creating a surface with a predetermined atomic surface density defined by the crystallographic orientation and a fixed number of unterminated bonds;
c) introducing gas precursors of a dopant material at a relatively low temperature, suspending further processing until thermal equilibrium is obtained;
d) rapidly elevating a temperature within the reaction chamber to a level sufficient to cause atoms of the dopant material to chemisorb with the top surface of the semiconductor material and bond to the fixed number of unterminated bonds in a substitutional bonding formation in a self-limiting deposition process, creating a single layer of dopant atoms of the same atomic surface density and leaving the same, fixed number of unterminated dopant bonds at the surface thereof;
e) purging the reaction chamber of gas precursor effluent;
f) introducing gas precursors of substrate material at a relatively low temperature, suspending further processing until thermal equilibrium is obtained;
g) rapidly elevating a temperature within the reaction chamber to a level sufficient to cause atoms of the substrate material to bond to the fixed number of unterminated dopant bonds in a substitutional bonding formation in a self-limiting deposition process, creating a layer of semiconductor atoms with the same atomic surface density and the same fixed number of unterminated bonds; and
h) repeating steps e) through g) to continue to deposit additional atomic layers of substrate material sufficient to create a predetermined dopant density, defined by the atomic surface density and the number N of additional atomic layers of substrate material.
2. The method as defined in claim 1 wherein the substrate material is silicon.
3. The method as defined in claim 2 wherein the silicon is oriented along the (100) crystallographic plane and has an atomic surface density of 6.78*10 14 atoms/cm 2 .
4. The method as defined in claim 1 wherein the dopant material is a material that modifies the conductivity of the semiconductor material.
5. The method as defined in claim 4 wherein the dopant material is a material that introduces a p-type conductivity to the semiconductor material.
6. The method as defined in claim 5 wherein the gas is diborane.
7. The method as defined in claim 4 wherein the dopant material is a material that introduces an n-type conductivity to the semiconductor material.
8. The method as defined in claim 7 wherein a gas precursor selected from the group consisting of arsine and phosphine.
9. The method as defined in claim 1 wherein the dopant material is a material that modifies the mobility of the semiconductor material.
10. The method as defined in claim 9 wherein the semiconductor material is silicon and the dopant material is carbon, forming a graphene structure.
11. The method as defined in claim 2 wherein in performing step b), the semiconductor substrate is exposed to a reactive gas to atomically clean the top major surface.
12. The method as defined in claim 11 wherein gaseous HF is used.Join the waitlist — get patent alerts
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