US9793113B2ActiveUtilityA1

Semiconductor structure having insulator pillars and semiconductor material on substrate

Assignee: GLOBALFOUNDRIES INCPriority: Mar 21, 2016Filed: Mar 21, 2016Granted: Oct 17, 2017
Est. expiryMar 21, 2036(~9.7 yrs left)· nominal 20-yr term from priority
H10P 50/28H10P 14/3414H10P 14/3411H10P 14/3211H10P 14/2925H10P 14/2901H10P 14/271H10P 14/60H10W 10/17H10W 10/014H10P 14/276H01L 21/31H01L 29/0649H01L 27/0924H01L 21/02532H01L 21/76224H01L 21/02639H01L 21/02647H01L 29/0657H01L 29/66795H01L 21/02538H01L 21/0243H01L 29/785H01L 21/311H01L 21/0237H01L 29/165H01L 29/66446H01L 21/0245H01L 21/823431H01L 29/1054H10D 84/853H10D 84/0158H10D 84/038H10D 62/822H10D 62/117H10D 62/115H10D 30/751H10D 30/62H10D 30/024H10D 30/01
52
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Cited by
11
References
12
Claims

Abstract

One aspect of the disclosure relates to a method of forming a semiconductor structure. The method may include: forming a set of openings within a substrate; forming an insulator layer within each opening in the set of openings; recessing the substrate between adjacent openings containing the insulator layer in the set of openings to form a set of insulator pillars on the substrate; forming sigma cavities within the recessed substrate between adjacent insulator pillars in the set of insulator pillars; and filling the sigma cavities with a semiconductor material over the recessed substrate between adjacent insulator pillars.

Claims

exact text as granted — not AI-modified
We claim: 
     
       1. A method of forming a semiconductor structure, the method comprising:
 forming a set of openings within a substrate; 
 forming an insulator layer within each opening in the set of openings; 
 recessing the substrate between adjacent openings containing the insulator layer in the set of openings to form a set of insulator pillars on the substrate; 
 forming sigma cavities within the recessed substrate between adjacent insulator pillars in the set of insulator pillars; 
 filling the sigma cavities with a semiconductor material over the recessed substrate between adjacent insulator pillars to a thickness less than a height of the insulator pillars; 
 recessing the set of insulator pillars to a height less than the height of the semiconductor material; and 
 forming additional semiconductor material over the recessed set of insulator pillars such that the additional semiconductor material is grown laterally from the semiconductor material. 
 
     
     
       2. The method of  claim 1 , wherein the forming of the set of openings within the substrate includes:
 forming a hard mask over the substrate; 
 patterning the hard mask to expose portions of the substrate; and 
 removing the exposed portions of the substrate to create the set of openings. 
 
     
     
       3. The method of  claim 1 , wherein the semiconductor material includes a III-V material. 
     
     
       4. The method of  claim 1 , wherein the insulator layer includes at least one of: an oxide or a nitride. 
     
     
       5. The method of  claim 1 , wherein the filling of the sigma cavities with the semiconductor material includes growing the semiconductor material to a height less than a height of the insulator pillars. 
     
     
       6. The method of  claim 1 , further comprising:
 forming a set of semiconductor fins over the set of insulator pillars in a material grown above a level of the set of insulator pillars. 
 
     
     
       7. A method of forming a semiconductor structure, the method comprising:
 forming a set of insulator pillars on a substrate; 
 forming a semiconductor material between adjacent insulator pillars of the set of insulator pillars, wherein a height of the semiconductor material is less than a height of the set of insulator pillars; 
 recessing the set of insulator pillars to a thickness below the height of the semiconductor material; and 
 forming additional semiconductor material over the recessed set of insulator pillars. 
 
     
     
       8. The method of  claim 7 , further comprising:
 forming sigma cavities within the substrate between adjacent insulator pillars in the set of insulator pillars after the forming of set of insulator pillars and prior to the forming of the semiconductor material between adjacent insulator pillars. 
 
     
     
       9. The method of  claim 7 , wherein the forming of the additional semiconductor material includes forming the additional semiconductor material laterally from the semiconductor material. 
     
     
       10. The method of  claim 7 , further comprising:
 after the forming of the semiconductor material and prior to the recessing of the set of insulator pillars, patterning a hard mask over the semiconductor material and exposing the set of insulator pillars; and 
 removing the hard mask after the forming of the additional semiconductor material. 
 
     
     
       11. The method of  claim 7 , wherein the semiconductor material and the additional semiconductor material together have a thickness of approximately 100 nanometers to approximately 200 nanometers. 
     
     
       12. The method of  claim 7 , wherein the forming of the set of insulator pillars includes:
 forming a hard mask over the substrate; 
 patterning the hard mask to expose portions of the substrate; 
 removing the exposed portions of the substrate to create openings in the substrate; 
 forming an insulator material in the substrate openings; and 
 recessing the substrate to a height of a bottom surface of the insulator material.

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