EEPROM backup method and device

Abstract

An electrically erasable programmable read-only memory (EEPROM) device includes a plurality of data areas in the EEPROM associated with a corresponding plurality of memory addresses, respectively, a data status indicator associated with each of the plurality of data areas. The data status indicator is configured to indicate that a data area is in an erase state, an uncertain state, or a valid state. The EEPROM device also includes a controller. A first data area and a second data area are configured to be a backup storage area for each other. In an erase and program cycle, at least one of the first or second memory areas is in a valid state throughout the erase and program cycle. Further, in an erase and program cycle, an erase operation is performed in one of the first or second memory areas, and a program operation is performed in the other data areas.

What is claimed is: 
     
       1. An electrically erasable programmable read-only memory (EEPROM) device, comprising:
 a plurality of data areas in the EEPROM associated with a corresponding plurality of memory addresses, respectively; 
 a data status indicator associated with each of the plurality of data areas, the data status indicator configured to indicate that a data area is in an erase state, an uncertain state, or a valid state; and 
 a controller; 
 wherein a first data area and a second data area are configured to be a backup storage area for each other; 
 wherein, in an erase and program cycle, at least one of the first or second memory areas is in a valid state throughout the erase and program cycle; and 
 wherein, in an erase and program cycle, an erase operation is performed in one of the first or second memory areas, and a program operation is performed in the other data areas. 
 
     
     
       2. The EEPROM device of  claim 1 , wherein the EEPROM device is configured such that:
 during an erase operation, a data area is in an uncertain state and after completion of the erase operation, the data area is in an erased state; and 
 during a program operation, the data area is in an uncertain state and after completion of the program operation, the data area is in a valid state; 
 wherein the EEPROM device is further configured to, in a single erase and program cycle:
 perform a program operation in a first data area that is in an erase state; and 
 after the program operation is completed, perform an erase operation in a second data area that is in a valid state; 
 
 wherein the EEPROM is configured such that at least one of the first or second memory areas is in a valid state throughout the single erase and program cycle. 
 
     
     
       3. The EEPROM device of  claim 2 , wherein the EEPROM device is configured to perform the following operations, in a first erase and program cycle:
 determining that a first data area is in an erased state and a second data area is in a valid state; 
 performing a program operation to store a first data in the first data area; 
 after completion of the program operation, setting the first data area to a valid state, and performing an erase operation in the second data area; and 
 after completion of the erase operation, setting the second data area to an erased state. 
 
     
     
       4. The EEPROM device of  claim 3 , wherein the EEPROM device is configured to perform the following operations, in a second erase and program cycle after the first erase and program cycle:
 performing a program operation to store a second data in the second data area; 
 after completion of the program operation, setting the second data area to a valid state, and performing an erase operation in the first data area; and 
 after completion of the erase operation, setting the first data area to an erased state. 
 
     
     
       5. The EEPROM device of  claim 2 , further comprising a sequence number associated with each of a plurality of data areas, wherein the EEPROM device is configured to perform the following operations:
 determining that both first and second data areas are in a valid state; 
 examining the sequence number in each of the first and second data areas to select one of the first or second data areas; and 
 performing an erase operation in the selected data area. 
 
     
     
       6. The EEPROM device of  claim 2 , wherein the EEPROM device is configured to perform the following operations:
 determining that an operation in a data area is not completed and that the data area is not in an erased state; and 
 performing an erase operation in that data area. 
 
     
     
       7. The EEPROM device of  claim 2 , wherein the EEPROM device is configured to determine if an erase operation or programming operation is completed. 
     
     
       8. A method for operating an electrically erasable programmable read-only memory (EEPROM), comprising:
 providing a plurality of data areas in the EEPROM associated with a corresponding plurality of memory addresses, respectively, wherein, during an erase operation a data area is in an uncertain state and, after completion of the erase operation, the data area is in an erased state, and wherein during a program operation, the data area is in an uncertain state and after completion of the program operation, the data area is in a valid state; 
 wherein the method further comprises, in a first erase and program cycle: 
 determining that a first data area is in an erased state and a second data area is in a valid state; 
 performing a program operation to store a first data in the first data area; 
 after completion of the program operation, setting the first data area to a valid state, and performing an erase operation in the second data area; 
 after completion of the erase operation, setting the second data area to an erased state; and 
 wherein the first data area and the second data area are configured to be a backup data storage area to each other.