US9785177B1ActiveUtility

Symmetrical positive and negative reference voltage generation

Assignee: NXP BVPriority: Aug 3, 2016Filed: Aug 3, 2016Granted: Oct 10, 2017
Est. expiryAug 3, 2036(~10 yrs left)· nominal 20-yr term from priority
H03F 3/45475H03F 2203/45248H03F 2200/165H03F 2203/45288G05F 3/16
88
PatentIndex Score
11
Cited by
5
References
14
Claims

Abstract

In an embodiment, an electronic device includes a first amplifier having a non-inverting input configured to receive a reference voltage and an inverting input coupled to a first output node, where the first amplifier is configured to produce a first output voltage at the first output node. The electronic device also includes a second amplifier having a non-inverting input coupled to a ground reference level, and an inverting input coupled to the first output node via a first resistor and to a second output node via a second resistor, where the second amplifier is configured to produce a second output voltage at the second output node.

Claims

exact text as granted — not AI-modified
The invention claimed is: 
     
       1. An electronic device, comprising:
 a first amplifier having a non-inverting input configured to receive a reference voltage and an inverting input coupled to a first output node, wherein the first amplifier is configured to produce a first output voltage at the first output node; 
 a second amplifier having a non-inverting input coupled to a ground reference level, and an inverting input coupled to the first output node via a first resistor and to a second output node via a second resistor, wherein the second amplifier is configured to produce a second output voltage at the second output node, wherein the reference voltage is selected via a multiplexer coupled to a resistor ladder, and wherein the resistor ladder is coupled to a reference current source or to a reference voltage source; and 
 a low-pass filter coupled to the multiplexer and to the non-inverting input of the first amplifier. 
 
     
     
       2. The electronic device of  claim 1 , wherein the first amplifier has a first stage configured to output a maximum current at an intermediary node. 
     
     
       3. An electronic device, comprising:
 a first amplifier having a non-inverting input configured to receive a reference voltage and an inverting input coupled to a first output node, wherein the first amplifier is configured to produce a first output voltage at the first output node; 
 a second amplifier having a non-inverting input coupled to a ground reference level, and an inverting input coupled to the first output node via a first resistor and to a second output node via a second resistor, wherein the second amplifier is configured to produce a second output voltage at the second output node, 
 wherein the first amplifier has a first stage configured to output a maximum current at an intermediary node, and wherein the first amplifier further includes a capacitor coupled to the intermediary node and to the ground reference level. 
 
     
     
       4. The electronic device of  claim 3 , further comprising a buffer stage coupled to the intermediary node. 
     
     
       5. The electronic device of  claim 3 , wherein in response to a positive step change in the reference voltage, the first output voltage increases at a first rate given by a ratio between the maximum current and a capacitance presented by the capacitor. 
     
     
       6. The electronic device of  claim 5 , wherein the second output voltage decreases with a second rate having a magnitude equal to the first rate. 
     
     
       7. A dual-reference voltage source, comprising:
 a first amplifier configured to produce a first reference voltage at a first output node with a first slew rate; 
 a second amplifier coupled to the first output node and configured to produce a second reference voltage at a second output node with a second slew rate having a magnitude equal to the first slew rate, wherein the second reference voltage is symmetric with respect to the first reference voltage, wherein the first amplifier has a non-inverting input configured to receive a selected voltage and an inverting input coupled to the first output node, wherein the selected voltage is selected via a multiplexer coupled to a resistor ladder, and wherein the resistor ladder is coupled to a reference current source or to a reference voltage source; and 
 a low-pass filter coupled to the multiplexer and to the non-inverting input of the first amplifier. 
 
     
     
       8. The dual-reference voltage source of  claim 7 , wherein the second amplifier has a non-inverting input coupled to a ground reference level, and an inverting input coupled to the first output node via a first resistor and to the second output node via a second resistor. 
     
     
       9. The dual-reference voltage source of  claim 7 , wherein the first amplifier has a first stage configured to output a maximum output current at an intermediary node. 
     
     
       10. A dual-reference voltage source, comprising:
 a first amplifier configured to produce a first reference voltage at a first output node with a first slew rate; 
 a second amplifier coupled to the first output node and configured to produce a second reference voltage at a second output node with a second slew rate having a magnitude equal to the first slew rate, wherein the second reference voltage is symmetric with respect to the first reference voltage, wherein the first amplifier has a non-inverting input configured to receive a selected voltage and an inverting input coupled to the first output node, wherein the first amplifier has a first stage configured to output a maximum output current at an intermediary node, and wherein the first amplifier further includes a capacitor coupled to the intermediary node and to the ground reference level. 
 
     
     
       11. The dual-reference voltage source of  claim 10 , wherein, in response to a change in the selected voltage, the first reference voltage changes with the first slew rate given by a ratio between the maximum output current and a capacitance of the capacitor. 
     
     
       12. The dual-reference voltage source of  claim 11 , wherein the second reference voltage changes in the opposite direction with a second slew rate having a magnitude equal to the first slew rate. 
     
     
       13. A method, comprising:
 receiving, at a non-inverting input of a first amplifier, a reference voltage, wherein the first amplifier has an inverting input coupled to a first output node; 
 producing a first output voltage at the first output node; and 
 producing a second output voltage symmetric with respect to the first output voltage at a second output node of a second amplifier, wherein the second amplifier has a non-inverting input coupled to a ground reference level, and an inverting input coupled to the first output node via a first resistor and to the second output node via a second resistor, 
 wherein the first amplifier has a first stage configured to output a maximum output current at an intermediary node, wherein the first amplifier further includes a capacitor coupled to the intermediary node and to the ground reference level, and wherein in response to a change in the selected voltage, the first reference voltage increases with a slew rate given by a ratio between the maximum output current and a capacitance of the capacitor. 
 
     
     
       14. The method of  claim 13 , wherein the first resistor has a first resistance and the second resistor has a second resistance, and wherein a ratio between the first and second resistances is proportional to a ratio between the magnitudes of the first and second output voltages.

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