US9753160B2ActiveUtilityA1
Digital X-ray sensor
Est. expiryMay 15, 2032(~5.8 yrs left)· nominal 20-yr term from priority
Inventors:Ronaldo Bellazzini
G01T 1/17G01T 1/247G01N 23/04
79
PatentIndex Score
11
Cited by
14
References
28
Claims
Abstract
A digital X-ray sensor having a detection layer, and a collection layer formed by pixels in the form of a CMOS ASIC, wherein the sensor is provided with a “photon-counting” function and is suitable for radiological applications, so that the best arrangement is obtained between the image quality and the radiation dose absorbed by a subject.
Claims
exact text as granted — not AI-modifiedThe invention claimed is:
1. A digital X-ray sensor ( 100 ) comprising:
a semiconductor conversion layer ( 10 ), configured for receiving X-ray photons ( 2 ) and for converting said X-ray photons ( 2 ) into an electric charge ( 14 );
a semiconductor collection layer ( 20 ) integrated with said conversion layer ( 10 ), said collection layer ( 20 ) formed by a plurality of collection pixels ( 22 ) that are arranged in a predetermined pattern, each collection pixel ( 22 ) of said collection layer ( 20 ) configured for receiving electrons ( 16 ) of said electric charge ( 14 ) from said conversion layer ( 10 );
a data output means ( 213 ) for transferring data collected by said collection pixels ( 22 ) to an acquisition electronics ( 50 );
wherein each collection pixel ( 22 ) comprises:
an amplification means ( 203 ) arranged for receiving said electric charge as an inlet charge, which comprises said electrons ( 16 ) produced by said conversion layer ( 10 ), said amplification means ( 203 ) configured for generating a voltage signal ( 17 ) that has a peak value ( 21 ) proportional to said inlet electric charge ( 16 );
a plurality of N window discriminators ( 24 i ), each discriminator ( 24 i ) comprising a plurality of CMOS transistors, each discriminator ( 24 i ) configured for:
carrying out a comparison between said peak value ( 21 ) and two charge threshold values ( 25 i , 25 i+1 ) comprising a lower threshold value ( 25 i ) and an upper threshold value ( 25 i+1 ), and
carrying out an instantaneous transition between a 0-level and an 1-level if:
said peak value ( 21 ) is higher than said lower threshold value ( 25 i ), and
said peak value ( 21 ) is lower than said upper threshold value ( 25 i+1 );
wherein, for each discriminator ( 24 i ), at least one condition occurs that is selected between:
said upper threshold value ( 25 i+1 ) is lower than said lower threshold value of at least one of said discriminators ( 24 k ,k≠i) distinct from said each discriminator ( 24 i ), in particular said upper threshold value ( 25 i+1 ) is equal to said lower threshold value of said at least one of said discriminators ( 24 k ,k≠i) distinct from said each discriminator ( 24 i );
said lower threshold value ( 25 i ) is higher than said lower threshold value of at least one of said discriminators ( 24 k ,k≠i) distinct from said each discriminator ( 24 i ), in particular said lower threshold value ( 25 i ) is equal to said upper threshold value of said at least one of said discriminators ( 24 k ,k≠i) distinct from said each discriminator ( 24 i ),
wherein each collection pixel ( 22 ) comprises a plurality of N counters ( 26 i ), each of said counters ( 26 i ) associated with a respective discriminator of said discriminators ( 24 i ),
wherein each counter ( 26 i ) is configured to increase by 1 unit a value of an own counting if:
said peak value ( 21 ) is higher than said lower threshold value ( 25 i ) of said respective discriminator ( 24 i ), and
said peak value ( 21 ) is lower than said upper threshold value ( 25 i+1 ) of said respective discriminator ( 24 i ),
while said counters ( 26 k ,k≠i) distinct from said each counter ( 26 i ) are configured for keeping unchanged an own count value,
wherein said data output means ( 213 ) is configured for receiving from said counters ( 26 i ) of each collection pixel ( 22 ) measurement data of the radiation ( 2 ) incident in N “colours” corresponding to the counts stored in N energy windows for each charge threshold,
characterized in that it comprises:
a digital-to-analog converter (DAC) ( 28 i ) for at least one discriminator ( 24 i ) of each collection pixel ( 22 ), said digital-to-analog converter ( 28 i ) configured for receiving combinations of a predetermined number of bits and for generating current values corresponding to said combinations of bits;
a current supply means ( 206 ) for supplying a current to each collection pixel ( 22 ), configured for supplying a current to said amplification means ( 203 ) responsive to said combinations of bits of said at least one discriminator ( 24 i );
a logical means ( 34 ) resident in each of said collection pixels ( 22 ), configured for determining an offset correction current value, said logical means configured for carrying out a calibration step within each collection pixel in order to establish which combination of bits of said combinations of bits of said or each digital-to-analog converter ( 28 i ) has to be used for supplying said correction current, said calibration step preliminarily carried out in each pixel by said logical means ( 34 ) at the same time for all said collection pixels ( 22 ),
wherein each of said collection pixels ( 22 ) comprises a memory unit ( 35 ) of said offset correction current value;
and wherein said logical means ( 34 ) is also configured for storing said correction current value into said memory unit ( 35 ).
2. The digital sensor according to claim 1 , wherein said logical means, which is resident in each of said collection pixels ( 22 ), is configured for carrying out said calibration step within each collection pixel by an iterative procedure ( 80 ) of computing said offset correction current value, said procedure comprising:
generating said combinations of bits;
transferring said combinations of bits to said digital-to-analog converter ( 28 i ) such that said digital-to-analog converter ( 28 i ) generates a corresponding trial current value;
causing said trial current to be supplied to said amplification means ( 203 ) through said supply means ( 206 );
receiving a count value of said counter ( 28 i );
repeating the above steps if said count value increases due to said trial current;
defining said trial current value as said correction current value if said count value does not increase due to said trial current.
3. The digital sensor according to claim 1 , wherein said trial current has a value that decreases at each iteration of said steps of said iterative procedure ( 80 ), starting from an initial trial current value adapted to cause a count event in each discriminator/counter unit ( 24 i / 26 i ), until a final trial current value is attained that does not cause a count event in said discriminator/counter unit ( 24 i / 26 i ), and said logical means of each collection pixel ( 22 ) is configured for defining said final trial current value as said correction current value of said collection pixel ( 22 ) in said memory unit ( 35 ) of said collection pixel ( 22 ).
4. The digital X-ray sensor according to claim 1 , wherein said collection pixels ( 22 ) have a hexagonal plan shape, and are arranged in a honeycomb pattern.
5. The digital X-ray sensor according to claim 1 , wherein said digital-to-analog converter ( 28 i ) has a bit number higher than or equal to 5, in particular said digital-to-analog converter ( 28 i ) is a 5-bit digital-to-analog converter.
6. The digital X-ray sensor according to claim 1 , wherein said lower charge threshold values ( 25 i , 25 i+1 ) of said discriminators ( 24 i ) are selected in such a way that photons energy fields, i.e. photons energy windows are defined selected from the group consisting of: 5 to 15 keV; 15 to 25 keV; 25 to 40 keV; 40 to 60 keV.
7. The digital X-ray sensor according to claim 1 , wherein said counters ( 26 i ) comprise ordinary 15-bit silicon registers.
8. The digital X-ray sensor according to claim 1 , wherein said sensor has side dimensions set between 2 and 4 cm, in particular dimensions of about 2.5×3.0 cm.
9. The digital X-ray sensor according to claim 1 , wherein said collection pixels ( 22 ) have a size set between 300 μm and 25 μm, in particular they have a size set between 150 μm and 25 μm, more in particular, they have a size set between 75 μm and 25 μm.
10. The digital X-ray sensor according to claim 9 , wherein said CMOS transistors are 0.18-μm CMOS transistors, and said collection pixels have a size of about 200 μm and comprise a number of said discriminators ( 24 i ) and of said counters ( 28 i ) such that eight energy windows are defined.
11. The digital X-ray sensor according to claim 9 , wherein said CMOS transistors are 0.18-μm CMOS transistors, and said collection pixels have a size of about 100 μm and comprise a number of said discriminators ( 24 i ) and of said counters ( 28 i ) such that six energy windows are defined.
12. The digital X-ray sensor according to claim 9 , wherein said CMOS transistors are 0.18-μm CMOS transistors, and said collection pixels have a size of about 50 μm and comprise a number of said discriminators ( 24 i ) and of said counters ( 28 i ) such that two energy windows are defined.
13. The digital X-ray sensor according to claim 9 , wherein said CMOS transistors are 0.045-μm CMOS transistors, and said collection pixels have a size of about 200 μm and comprise a number of said discriminators ( 24 i ) and of said counters ( 28 i ) such that thirty-two energy window are defined.
14. The digital X-ray sensor according to claim 9 , wherein said CMOS transistors are 0.045-μm CMOS transistors, and said collection pixels have a size of about 100 μm and comprise a number of said discriminators ( 24 i ) and of said counters ( 28 i ) such that sixteen energy windows are defined.
15. The digital X-ray sensor according to claim 9 , wherein said CMOS transistors are 0.045-μm CMOS transistors, and said collection pixels have a size of about 50 μm and comprise a number of said discriminators ( 24 i ) and of said counters ( 28 i ) such that eight energy windows are defined.
16. The digital X-ray sensor ( 100 ) according to claim 1 , wherein said semiconductor conversion layer ( 10 ) comprises a plurality of conversion pixels ( 11 ) arranged in a pattern corresponding to the pattern of the collection pixels ( 22 ) of said collection layer ( 20 ), wherein each conversion pixel ( 11 ) univocally corresponds to a respective collection pixel ( 11 ), and an electric connection is provided between each conversion pixel ( 11 ) and said respective collection pixel ( 22 ).
17. The digital X-ray sensor according to claim 1 , wherein the conversion layer ( 10 ) is made of a crystalline material.
18. The digital X-ray sensor according to claim 5 , wherein said crystalline material has a metallization layer ( 13 ) facing said collection layer ( 10 ) which has a pixel structure ( 11 ).
19. The digital X-ray sensor according to claim 5 , wherein the pixels ( 11 ) of said conversion layer ( 10 ), which face said pixels ( 22 ) of said collection layer ( 20 ), are obtained by a photolithographic technique, in particular by deposition and patterning of thin semiconductor and insulating metal films.
20. The digital X-ray sensor according to claim 1 , wherein said conversion layer ( 10 ) is joined pixel-by-pixel ( 11 - 22 ) with said collection layer ( 20 ) by a bump-bonding technique, i.e. through a plurality of bumps ( 23 ) made of an electrically conductive material, which are located between the conversion layer ( 10 ) and the collection layer ( 20 ), wherein each bump ( 23 ) is arranged at a respective collection pixel ( 22 ).
21. The digital X-ray sensor according to claim 1 , wherein said conversion layer ( 10 ) is obtained by coating said collection layer ( 20 ) by an evaporation and deposition technique, in particular by a screen-printing technique, of a polycrystalline or amorphous semiconductor material on said collection layer ( 20 ).
22. The digital X-ray sensor according to claim 1 , wherein said conversion layer ( 10 ) comprises a material selected from the group consisting of: Cadmium telluride; Selenium; Lead iodide; Mercuric iodide; Gallium arsenide; Germanium or a combination of said materials.
23. The digital X-ray sensor according to claim 1 , wherein a conversion layer ( 10 ) cooling means is provided that is configured for bringing and maintaining said conversion layer ( 10 ), in use, to/at a temperature lower than a predetermined maximum operation temperature, in particular the cooling means is configured for bringing and maintaining said conversion layer between 20° C. and 40° C.,
in particular, said cooling means comprises a Peltier cell device that has a cold face in contact with said collection layer ( 20 ) and a hot face exposed to a heat removal means.
24. The digital X-ray sensor according to claim 1 , wherein said collection layer ( 20 ) has a conductive pad ( 33 ), in particular an aluminium pad, for each collection pixel, in particular said pad ( 33 ) forms an interface towards said charge amplification means ( 203 ), which forms the inlet stage of the electronics ( 200 ) of each pixel ( 22 ).
25. The digital X-ray sensor according to claim 11 , comprising a means ( 4 , 5 , 12 , 13 ) for creating an electric field within said collection layer ( 20 ), said means comprising:
a first metal thin film ( 12 ) arranged about said sensor ( 100 ) and configured for being brought to a first predetermined voltage, and
a second thin film ( 13 ) arranged upon the conversion layer ( 10 ) at the side connected to said collection layer ( 20 ), said second thin film configured for being brought to a voltage of said inlet pads ( 33 ) of said conversion layer ( 10 ).
26. The digital X-ray sensor according to claim 12 , wherein said second thin film ( 13 ), in particular along with further metal films deposited on the same face of said conversion layer ( 20 ), is configured to provide a Schottky type junction.
27. A radiographic imaging method by an X-ray sensor ( 100 ), said method comprising:
irradiating a semiconductor conversion layer ( 10 ) with X-ray photons ( 2 ) and converting said X-ray photons ( 2 ) into an electric charge ( 14 ) by said conversion layer ( 10 );
prearranging a semiconductor collection layer ( 20 ) integrated with said conversion layer ( 10 ), said collection layer ( 20 ) formed by a plurality of collection pixels ( 22 ) that are arranged in a predetermined pattern;
receiving electrons ( 16 ) of said electric charge ( 14 ) from said conversion layer ( 10 ) by each collection pixel ( 22 ) of said collection layer ( 20 );
amplifying ( 203 ) said electric charge in each collection pixel ( 22 ), and producing a voltage signal ( 17 ) that has a peak value ( 21 ) proportional to said electric charge ( 16 );
discriminating said peak value in each collection pixel ( 22 ) by a plurality of N window discriminators ( 24 i ), each discriminator ( 24 i ) comprising a plurality of CMOS transistors, wherein each discriminator ( 24 i ):
performs a comparison between said peak value ( 21 ) and two charge threshold values ( 25 i , 25 i+1 ) comprising a lower threshold value ( 25 i ) and a upper threshold value ( 25 i+1 ), and
performs an instantaneous transition between a 0-level and a 1-level if:
said peak value ( 21 ) is higher than said lower threshold value ( 25 i ), and
said peak value ( 21 ) is lower than said upper threshold value ( 25 i+1 );
wherein, for each discriminator ( 24 i ) at least one condition occurs selected between:
said upper threshold value ( 25 i+1 ) is lower than said lower threshold value of at least one of said discriminators ( 24 k ,k≠i) distinct from said each discriminator ( 24 i ), in particular said upper threshold value ( 25 i+1 ) is equal to said lower threshold value of said at least one of said discriminators ( 24 k ,k≠i) distinct from said each discriminator ( 24 i );
said lower threshold value ( 25 i ) is higher than said lower threshold value of at least one of said discriminators ( 24 k ,k≠i) distinct from said each discriminator ( 24 i ), in particular said lower threshold value ( 25 i ) is equal to said upper threshold value of said at least one of said discriminators ( 24 k ,k≠i) distinct from said each discriminator ( 24 i );
counting, in each collection pixel ( 22 ), the peak values discriminated at each discriminator by means of a plurality of N counters ( 26 i ), each of said counters ( 26 i ) associated with a respective discriminator of said discriminators ( 24 i ),
wherein said counting in each counter ( 26 i ) is carried out by increasing a value of an own counting by 1 unit, if:
said peak value ( 21 ) is higher than said lower threshold value ( 25 i ) of said respective discriminator ( 24 i ) and
said peak value ( 21 ) is lower than said upper threshold value ( 25 i+1 ) of said respective discriminator ( 24 i ),
while said counters ( 26 k ,k≠i) distinct from said each counter ( 26 i ) maintain unchanged an own count value,
acquiring, by a data output means ( 213 ), data collected by said collection pixels ( 22 ) for transmitting said data to an acquisition electronics ( 50 );
characterized in that it comprises:
prearranging a digital-to-analog converter (DAC) ( 28 i ) for at least one discriminator ( 24 i ) of each collection pixel ( 22 ), said converter configured for receiving combinations of a predetermined number of bits and for generating current values corresponding to said combinations of bits;
supplying a correction current ( 206 ) to said amplification means ( 203 ) of each of said collection pixels ( 22 ), said current supplied responsive to said combinations of bits of said at least one discriminator ( 24 i );
and in that it also comprises a calibration step carried out within each collection pixel in order to establish which combination of bits of said combinations of bits of said or each digital-to-analog converter ( 28 i ) has to be used for supplying said correction current, said calibration step carried out preliminarily in each pixel by a logical means ( 34 ) that is resident in each of said collection pixels ( 22 );
wherein said calibration step is carried out within each collection pixel at the same time for all said collection pixels ( 22 ).
28. A radiographic imaging method according to claim 27 , wherein said calibration step comprises an iterative procedure ( 80 ) of computing an offset correction current value, comprising:
generating said combinations of bits;
transferring said combinations of bits to said digital-to-analog converter ( 28 i ) such that said digital-to-analog converter ( 28 i ) generates a corresponding trial current value;
causing said trial current to be supplied to said amplification means ( 203 ) through said supply means ( 206 );
receiving a count value of said counter ( 28 i );
repeating the above steps if said count value increases due to said trial current;
defining said trial current value as said correction current value if said count value does not increase due to said trial current.Join the waitlist — get patent alerts
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