US9652338B2ActiveUtilityA1

Dynamic checkpointing systems and methods

Assignee: STRATUS TECH BERMUDA LTDPriority: Dec 30, 2013Filed: Dec 16, 2014Granted: May 16, 2017
Est. expiryDec 30, 2033(~7.4 yrs left)· nominal 20-yr term from priority
G06F 11/1484
88
PatentIndex Score
15
Cited by
166
References
5
Claims

Abstract

A method for determining a delay in a dynamic, event driven, checkpoint interval. In one embodiment, the method includes the steps of determining the number of network bits to be transferred; determining the target bit transfer rate; calculating the next cycle delay as the number of bits to be transferred divided by the target bit transfer rate. In another aspect, the invention relates to a method for delaying a checkpoint interval. In one embodiment, the method includes the steps of monitoring the transfer of a prior batch of network data and delaying a subsequent checkpoint until the transfer of a prior batch of network data has reached a certain predetermined level of completion. In another embodiment, the predetermined level of completion is 100%.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A checkpoint computing system comprising:
 a first fault tolerant computing device comprising a primary machine; and 
 a second computing device; wherein the first computing device and the second computing device are networked, 
 wherein the primary machine comprises a first checkpointing engine and a first network interface, 
 wherein the second computing device comprises a second network interface, 
 wherein the first checkpointing engine delays a checkpoint by a delay interval, irrespective of network protocol and protocol state information, in response to a number of buffered network bits to be transferred N from the first machine to the second machine and a target bit transfer rate R; and 
 wherein the checkpoint delay interval is canceled in response to pending network traffic exceeding remaining released traffic. 
 
     
     
       2. The checkpoint computing system of  claim 1  wherein the checkpoint delay interval is varied in response to the actual network bit transfer rate. 
     
     
       3. The checkpoint computing system of  claim 1  wherein the checkpoint delay interval is equal to a batch size in bits N being transferred divided by the target network delivery rate R. 
     
     
       4. The checkpoint computing system of  claim 1  wherein the first checkpointing engine delays the checkpoint in response to a minimum delay. 
     
     
       5. The checkpoint computing system of  claim 1  wherein the checkpoint interval delay is equal to a batch size in bits being transferred, divided by the target network delivery rate, plus an additional minimum delay.

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