Buffer chain management for alleviating routing congestion

Abstract

Systems and techniques for alleviating congestion are described. A set of buffer chains that pass through a congested region of the circuit design can be identified. Next, the set of the buffer chains can be removed from the circuit design. A placement blockage in the circuit design can then be created that covers at least a portion of the congested region. Next, the buffer chains that were removed can be reconstructed in the circuit design in the presence of the placement blockage, thereby alleviating congestion. Once the buffer chains have been reconstructed, the placement blockage can be removed from the circuit design. In some embodiments, congestion can be alleviated by spreading out buffer chains based on spreading out center of mass lines corresponding to the buffer chains.

What is claimed is: 
     
       1. In an electronic design automation (EDA) tool, a method for alleviating congestion in a circuit design, the method comprising:
 upon receipt of the circuit design, identifying a set of buffer chains that pass through a congested region of the circuit design; 
 removing the set of the buffer chains from the circuit design; 
 creating a placement blockage in the circuit design that covers at least a portion of the congested region; 
 reconstructing, by computer, the set of buffer chains in the circuit design in the presence of the placement blockage; and 
 removing the placement blockage from the circuit design. 
 
     
     
       2. The method of  claim 1 , wherein a buffer chain passes through the congested region if all sources and sinks of the buffer chain are located outside the congested region. 
     
     
       3. The method of  claim 1 , wherein the set of buffer chains does not include buffer chains whose placement has been fixed by a user. 
     
     
       4. The method of  claim 1 , wherein the set of buffer chains does not include buffer chains whose timing slack is less than a threshold timing slack value. 
     
     
       5. The method of  claim 1 , wherein said reconstructing the set of buffer chains comprises:
 determining the number of buffers in each buffer chain; 
 determining a size for each buffer in each buffer chain, and 
 determining a location for each buffer in each buffer chain. 
 
     
     
       6. The method of  claim 1 , further comprising displaying a visual representation of congestion in the circuit design through a graphical user interface (GUI). 
     
     
       7. The method of  claim 6 , further comprising receiving a user-selected contour of the congested region through the GUI. 
     
     
       8. The method of  claim 6 , further comprising receiving a user-selected contour of the placement blockage through the GUI. 
     
     
       9. A non-transitory computer-readable storage medium storing instructions that, when executed by a computer, cause the computer to perform a method for alleviating congestion in a circuit design, the method comprising:
 upon receipt of the circuit design, identifying a set of buffer chains that pass through a congested region of the circuit design; 
 removing the set of the buffer chains from the circuit design; 
 creating a placement blockage in the circuit design that covers at least a portion of the congested region; 
 reconstructing, by computer, the set of buffer chains in the circuit design in the presence of the placement blockage; and 
 removing the placement blockage from the circuit design. 
 
     
     
       10. The non-transitory computer-readable storage medium of  claim 9 , wherein a buffer chain passes through the congested region if all sources and sinks of the buffer chain are located outside the congested region. 
     
     
       11. The non-transitory computer-readable storage medium of  claim 9 , wherein the set of buffer chains does not include buffer chains whose placement has been fixed by a user. 
     
     
       12. The non-transitory computer-readable storage medium of  claim 9 , wherein the set of buffer chains does not include buffer chains whose timing slack is less than a threshold timing slack value. 
     
     
       13. The non-transitory computer-readable storage medium of  claim 9 , wherein said reconstructing the set of buffer chains comprises:
 determining the number of buffers in each buffer chain; 
 determining a size for each buffer in each buffer chain, and 
 determining a location for each buffer in each buffer chain. 
 
     
     
       14. The non-transitory computer-readable storage medium of  claim 9 , wherein the method further comprises displaying a visual representation of congestion in the circuit design through a graphical user interface (GUI). 
     
     
       15. The non-transitory computer-readable storage medium of  claim 14 , wherein the method further comprises receiving a user-selected contour of the congested region through the GUI. 
     
     
       16. The non-transitory computer-readable storage medium of  claim 14 , wherein the method further comprises receiving a user-selected contour of the placement blockage through the GUI. 
     
     
       17. An apparatus, comprising:
 a processor; and 
 a non-transitory computer-readable storage medium storing instructions that, when executed by the processor, cause the apparatus to perform a method for alleviating congestion in a circuit design, the method comprising:
 upon receipt of the circuit design, identifying a set of buffer chains that pass through a congested region of the circuit design; 
 removing the set of the buffer chains from the circuit design; 
 creating a placement blockage in the circuit design that covers at least a portion of the congested region; 
 reconstructing, by computer, the set of buffer chains in the circuit design in the presence of the placement blockage; and 
 removing the placement blockage from the circuit design. 
 
 
     
     
       18. The apparatus of  claim 17 , wherein a buffer chain passes through the congested region if all sources and sinks of the buffer chain are located outside the congested region. 
     
     
       19. The apparatus of  claim 17 , wherein the set of buffer chains does not include buffer chains whose timing slack is less than a threshold timing slack value. 
     
     
       20. The apparatus of  claim 17 , wherein said reconstructing the set of buffer chains comprises:
 determining the number of buffers in each buffer chain; 
 determining a size for each buffer in each buffer chain, and 
 determining a location for each buffer in each buffer chain.