US9608122B2ActiveUtilityA1

Semiconductor device and method for manufacturing the same

Assignee: SEMICONDUCTOR ENERGY LABPriority: Mar 27, 2013Filed: Mar 24, 2014Granted: Mar 28, 2017
Est. expiryMar 27, 2033(~6.7 yrs left)· nominal 20-yr term from priority
H01L 29/41733H01L 29/7869H01L 29/78606H01L 29/78693H01L 29/66969H10D 99/00H10D 30/6756H10D 30/6729H10D 30/6704H10D 30/6755
83
PatentIndex Score
4
Cited by
198
References
22
Claims

Abstract

A highly reliable semiconductor device with stable electrical characteristics and a method for manufacturing the semiconductor device are provided. A separation layer is formed between a source electrode and a drain electrode. The separation layer is formed using a material having a high insulating property. The separation layer between the source electrode and the drain electrode can reduce a difference in level of each of the source electrode and the drain electrode, which can improve coverage with a layer formed over the source electrode and the drain electrode. The separation layer between the source electrode and the drain electrode can prevent an unintended electrical short circuit of the source electrode and the drain electrode. The separation layer can be formed by introducing oxygen to a conductive layer.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A semiconductor device comprising:
 a semiconductor layer; 
 a source electrode comprising a metal element in electrical contact with the semiconductor layer; 
 a drain electrode comprising the metal element in electrical contact with the semiconductor layer; 
 a gate insulating layer overlapping with the source electrode and the drain electrode; and 
 a gate electrode overlapping with the semiconductor layer with the gate insulating layer provided between the gate electrode and the semiconductor layer, 
 wherein the source electrode and the drain electrode are part of a continuous layer formed continuously between the source electrode and the drain electrode and comprising the metal element, and 
 wherein the source electrode and the drain electrode are separated by a separation layer that is a portion of the continuous layer having a property of being electrically insulating. 
 
     
     
       2. The semiconductor device according to  claim 1 ,
 wherein in a region overlapping the gate electrode, a top surface of the separation layer, a top surface of the source electrode, and a top surface of the drain electrode are substantially aligned with each other. 
 
     
     
       3. The semiconductor device according to  claim 1 ,
 wherein a thickness of each of the source electrode and the drain electrode is greater than or equal to 5 nm and less than or equal to twice a channel length L of the semiconductor device at least partly. 
 
     
     
       4. The semiconductor device according to  claim 1 , wherein a channel length L of the semiconductor device is less than or equal to 50 nm. 
     
     
       5. The semiconductor device according to  claim 1 , wherein the semiconductor layer includes an oxide semiconductor. 
     
     
       6. The semiconductor device according to  claim 1 , wherein the semiconductor layer is a stack including an oxide semiconductor layer and an oxide layer. 
     
     
       7. The semiconductor device according to  claim 1 ,
 wherein the separation layer comprises oxygen at a higher concentration that the source electrode and the drain electrode. 
 
     
     
       8. The semiconductor device according to  claim 1 , further comprising:
 a first source electrode between the semiconductor layer and the source electrode; and 
 a first drain electrode between the semiconductor layer and the drain electrode. 
 
     
     
       9. The semiconductor device according to  claim 8 ,
 wherein a part of the source electrode extends beyond an end portion of the first source electrode to be in contact with the semiconductor layer, and 
 wherein a part of the drain electrode extends beyond an end portion of the first drain electrode to be in contact with the semiconductor layer. 
 
     
     
       10. A semiconductor device comprising:
 a semiconductor layer; 
 a first source electrode over the semiconductor layer to be in contact with a part of the semiconductor layer; 
 a second source electrode comprising a metal element over the first source electrode, wherein a part of the second source electrode extends beyond an end portion of the first source electrode to be in contact with the semiconductor layer; 
 a first drain electrode over the semiconductor layer to be in contact with another part of the semiconductor layer; 
 a second drain electrode comprising the metal element over the first drain electrode, wherein a part of the second drain electrode extends beyond an end portion of the first drain electrode to be in contact with the semiconductor layer; 
 a separation layer comprising the metal element, wherein side surfaces of the separation layer are in contact with a side surface of the second source electrode and a side surface of the second drain electrode, respectively; 
 a gate insulating layer over the second source electrode, the second drain electrode, and the separation layer; and 
 a gate electrode over the separation layer and the semiconductor layer with the gate insulating layer provided between the gate electrode and the separation layer. 
 
     
     
       11. The semiconductor device according to  claim 10 ,
 wherein in a region overlapping the gate electrode, a top surface of the separation layer, a top surface of the second source electrode, and a top surface of the second drain electrode are substantially aligned with each other. 
 
     
     
       12. The semiconductor device according to  claim 10 ,
 wherein a thickness of each of the second source electrode and the second drain electrode is greater than or equal to 5 nm and less than or equal to twice a channel length L. 
 
     
     
       13. The semiconductor device according to  claim 10 , wherein a channel length L of the semiconductor device is less than or equal to 50 nm. 
     
     
       14. The semiconductor device according to  claim 10 , wherein the semiconductor layer includes an oxide semiconductor. 
     
     
       15. The semiconductor device according to  claim 10 , wherein the semiconductor layer is a stack including an oxide semiconductor layer and an oxide layer. 
     
     
       16. The semiconductor device according to  claim 10 ,
 wherein the separation layer has an insulating property, and 
 wherein the separation layer further comprises oxygen. 
 
     
     
       17. A method for manufacturing a semiconductor device comprising the steps of:
 forming a semiconductor layer; 
 forming a conductive layer; 
 introducing oxygen selectively to a part of the conductive layer to form a separation layer having a property of being electrically insulating, thereby forming a source electrode a drain electrode electrically insulated from each other, the separation layer being continuously formed from the source electrode to the drain electrode; 
 forming a gate insulating layer overlapping with the semiconductor layer and the separation layer; and 
 forming a gate electrode overlapping with the semiconductor layer, the separation layer, and the gate insulating layer with the gate insulating layer interposed between the gate electrode and the semiconductor layer. 
 
     
     
       18. The method for manufacturing a semiconductor device, according to  claim 17 , wherein the semiconductor layer includes an oxide semiconductor. 
     
     
       19. The method for manufacturing a semiconductor device, according to  claim 17 , wherein the semiconductor layer is a stack including an oxide semiconductor layer and an oxide stack. 
     
     
       20. The method for manufacturing a semiconductor device, according to  claim 17 ,
 wherein a thickness of each of the source electrode and the drain electrode is greater than or equal to 5 nm and less than or equal to twice a channel length L of the semiconductor device at least partly. 
 
     
     
       21. The method for manufacturing a semiconductor device, according to  claim 17 , wherein a channel length L of the semiconductor device is less than or equal to 50 nm. 
     
     
       22. The method for manufacturing a semiconductor device, according to  claim 17 , wherein oxygen is introduced by an ion implantation method or an ion doping method.

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