US9602136B2ActiveUtilityA1

Bit interleaver for low-density parity check codeword having length of 64800 and code rate of 4/15 and 256-symbol mapping, and bit interleaving method using same

Assignee: ELECTRONICS & TELECOMMUNICATIONS RES INSTPriority: Mar 6, 2014Filed: Mar 2, 2015Granted: Mar 21, 2017
Est. expiryMar 6, 2034(~7.6 yrs left)· nominal 20-yr term from priority
H03M 13/618H03M 13/1165H03M 13/2778H03M 13/17H03M 13/2792H03M 13/27H03M 13/6522H03M 13/255H03M 13/1102H03M 13/2703
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PatentIndex Score
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References
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Claims

Abstract

A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 4/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 256-symbol mapping.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A bit group-unit interleaver, comprising:
 a first memory configured to store a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of  4 / 15 ; 
 a processor configured to generate an interleaved codeword by interleaving the LDPC codeword on a bit group basis, the size of the bit group corresponding to a parallel factor of the LDPC codeword; 
 and a second memory configured to store the interleaved codeword corresponding to a modulator for 256-symbol mapping, 
 wherein the interleaving is performed using the following equation using permutation order:
     Y   j = X   π(j) 0≦ j≦N   group  
 
 
 where X π(j)  is a π(j) th bit group (X j  is a j-th bit group), Y j  is an interleavened j-th bit group, N  group  is the number of bit groups obtained by dividing the LDPC codeword into the bit groups, and π(j) is a permutation order for bit group-based interleaving, and 
 wherein the permutation order corresponds to an interleaving sequence represented by the following interleaving sequence: 
 {13 121 137 29 27 1 70 116 35 132 109 51 55 58 11 67 136 25 145 7 75 107 45 21 127 52 90 22 100 123 69 112 155 92 151 59 5 179 44 87 56 139 65 170 46 0 124 78 166 8 61 97 120 103 4 19 64 79 28 134 93 86 60 135 126 53 63 14 122 17 150 76 42 39 23 153 95 66 50 141 176 34 161 26 106 10 43 85 131 2 147 148 144 54 115 146 101 172 114 119 3 96 133 99 167 164 9 142 68 149 94 83 16 175 73 38 143 159 130 84 169 18 138 102 72 47 32 160 82 81 168 30 12 173 156 158 125 98 62 178 48 163 117 110 91 37 80 105 31 174 111 49 113 108 74 157 128 24 118 40 88 177 154 6 162 129 77 36 165 20 89 140 15 33 104 152 71 171 57 41} 
 and 
 wherein a modulated signal output from the modulator corresponds to a transmission signal, the transmission signal being transmitted to a reception device. 
 
     
     
       2. The bit group-unit interleaver of  claim 1 , wherein the 256-symbol mapping is a Non-Uniform Constellation (NUC) symbol mapping which corresponds to 256 constellations. 
     
     
       3. The bit group-unit interleaver of  claim 2 , wherein the parallel factor is 360, and the bit group includes 360 bits. 
     
     
       4. The bit group-unit interleaver of  claim 3 , wherein the LDPC codeword is represented by (u 0, u 1 ,. . . ,u N     ldpc     −1 ), and is divided into 180 bit groups each including 360 bits, as in the following equation:
     X    j ={ u   k |360× j≦k< 360×( j+ 1),0 ≦ k<N   ldpc } for 0≦ j<N   group  
 
 
       where X j  is a j-th bit group, N ldpc  is 64800, N group  is 180, u is the LDPC codeword, k is a bit index, and j is a group index.

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