US9271390B2ActiveUtilityA1

Semiconductor device with active shielding of leads

Assignee: SRIVASTAVA SUNAINAPriority: Jul 15, 2014Filed: Jul 15, 2014Granted: Feb 23, 2016
Est. expiryJul 15, 2034(~8 yrs left)· nominal 20-yr term from priority
H10W 90/756H10W 72/9445H10W 72/07554H10W 72/5473H10W 72/932H10W 72/547H10W 72/59H10W 44/00H10W 42/20H10W 70/465H01L 2224/4805H01L 2224/4899H05K 1/0216H01L 24/48H01L 23/552H01L 23/64
30
PatentIndex Score
0
Cited by
19
References
11
Claims

Abstract

A semiconductor device has a multi-wire lead and a die having a multi-site bond pad. A shielding wire and a guarded wire both extend from the multi-wire lead to the multi-site bond pad. The shielding wire (or wires) provide active shielding to the guarded wire by simultaneously transmitting the same signal as the guarded wire between the multi-wire lead the multi-site bond pad.

Claims

exact text as granted — not AI-modified
The invention claimed is: 
     
       1. A semiconductor device, comprising:
 a die having a multi-site bond pad; 
 a multi-wire lead; 
 at least one shielding wire extending from the multi-wire lead to the multi-site bond pad; and 
 a guarded wire extending from the multi-wire lead to the multi-site bond pad, wherein the at least one shielding wire and the guarded wire simultaneously transmit the same signals between the multi-site bond pad and the multi-wire lead. 
 
     
     
       2. The semiconductor device of  claim 1 , wherein the multi-wire lead is “T” shaped. 
     
     
       3. The semiconductor device of  claim 2 , wherein the at least one shielding wire comprises two shielding wires extending from the multi-wire lead to the multi-site bond pad. 
     
     
       4. The semiconductor device of  claim 3 , wherein the two shielding wires extend between the multi-wire lead and the multi-site bond pad on opposite sides of the guarded wire. 
     
     
       5. The semiconductor device of  claim 1 , wherein the multi-site bond pad has at least one shielding-wire bond-pad site and a guarded-wire bond-pad site. 
     
     
       6. The semiconductor device of  claim 5 , wherein the multi-site bond pad has two shielding-wire bond-pad sites each located on opposite sides of the guarded-wire bond-pad site. 
     
     
       7. The semiconductor device of  claim 5 , wherein the at least one shielding-wire bond-pad site and the guarded-wire bond-pad site are physically connected to one another without having impedance therebetween. 
     
     
       8. The semiconductor device of  claim 1 , wherein the semiconductor device is a low-profile quad flat package. 
     
     
       9. The semiconductor device of  claim 1 , wherein the signals are neither power nor ground voltage. 
     
     
       10. The semiconductor device of  claim 1 , wherein the multi-site bond pad comprises at least one shielding-wire sub-bond-pad that has the shielding wire bonded thereto, and a guarded-wire sub-bond-pad that has the guarded wire bonded thereto, wherein the shielding-wire sub-bond-pad and the guarded-wire sub-bond-pad are physically connected to one another without having impedance therebetween. 
     
     
       11. The semiconductor device of  claim 10 , wherein the at least one shielding-wire sub-bond-pad comprises two shielding-wire sub-bond-pads respectively located on opposite sides of the guarded-wire sub-bond-pad, and wherein the at least one shielding wire comprises two shielding wires respectively extending from the multi-wire lead to the two shielding-wire sub-bond-pads such that the two shielding wires are generally parallel to and on opposing sides of the guarded wire.

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