Semiconductor device and method for manufacturing the same

Abstract

A method for manufacturing a semiconductor device includes a first photolithography step of forming a first device pattern corresponding to a first pattern, and a plurality of alignment marks corresponding to a plurality of marks, upon a step of exposing the entire device region in one shot using a first mask including the first pattern and the plurality of marks, and a second photolithography step of, after the first photolithography step, forming second device patterns respectively corresponding to second patterns in a plurality of divided regions which form the device region, upon steps of individually exposing the plurality of divided regions using second masks each including the second pattern corresponding thereto.

What is claimed is: 
     
       1. A method for manufacturing a semiconductor device including a device region in which a circuit element is formed, the method comprising:
 a first photolithography step of forming a first device pattern corresponding to a first pattern, and a plurality of alignment marks corresponding to a plurality of marks, said first photolithography step including a step of exposing the entire device region in one shot using a first mask including the first pattern and the plurality of marks; and 
 a second photolithography step of, after said first photolithography step, forming second device patterns respectively corresponding to second patterns in a plurality of divided regions which form the device region, said second photolithography step including steps of individually exposing the plurality of divided regions at different times using second masks each including the second pattern corresponding thereto, 
 wherein the plurality of marks are arranged on the first mask so that at least three alignment marks are formed in each of the plurality of divided regions, and 
 wherein, in said second photolithography step, at least one alignment mark of the plurality of alignment marks, which is formed in a divided region to be exposed is used to align the second mask with the divided region to be exposed, and 
 each divided region has a rectangular shape, and the plurality of marks include marks arranged so that alignment marks are formed at least at three corner portions among four corner portions of the each divided region. 
 
     
     
       2. The method according to  claim 1 , wherein the plurality of marks include a mark arranged so that an alignment mark is formed near a boundary between divided regions in the device region. 
     
     
       3. The method according to  claim 1 , wherein
 the plurality of divided regions in the device region include a first divided region and a second divided region, and 
 the plurality of marks include a mark arranged so that an alignment mark is formed in the first divided region near a boundary between the first divided region and the second divided region, and a mark arranged so that an alignment mark is formed in the second divided region near the boundary. 
 
     
     
       4. The method according to  claim 1 , wherein the semiconductor device includes an image sensing device. 
     
     
       5. The method according to  claim 1 , wherein
 the first device pattern includes a pattern for an element isolation portion, and 
 the second device pattern includes a pattern for a contact hole. 
 
     
     
       6. The method according to  claim 1 , wherein
 the first device pattern includes a pattern for a gate electrode, and 
 the second device pattern includes a pattern for a contact hole.