US9023727B2ActiveUtilityA1

Method of manufacturing semiconductor packaging

Assignee: SHEN GENG SHINPriority: Jun 27, 2012Filed: Jun 27, 2012Granted: May 5, 2015
Est. expiryJun 27, 2032(~5.9 yrs left)· nominal 20-yr term from priority
Inventors:Geng-Shin Shen
H10W 72/29H10W 72/952H10W 72/9415H10W 72/923H10W 72/019H10W 72/252H10W 72/222H10W 72/01257H10W 72/01255H10W 72/01235H10W 72/01238H10W 72/01225H10W 72/01223H10W 70/093H10W 70/041H01L 2224/05582H01L 2224/1132H01L 2224/13082H01L 24/11H01L 2224/05655H01L 2924/01074H01L 2224/05027H01L 2224/13147H01L 2224/13144H01L 2224/1147H01L 2224/11849H01L 2224/1145H01L 2224/11332H01L 2224/11318H01L 21/4853H01L 2224/05644H01L 24/13H01L 2224/05166H01L 2224/11334H01L 2224/11452H01L 2224/05572H01L 2224/13155H01L 2224/03912H01L 2224/05647H01L 2924/00014H01L 2224/11462
42
PatentIndex Score
0
Cited by
2
References
15
Claims

Abstract

The present disclosure is related to a method of providing a die structure for semiconductor packaging. The method includes providing a substrate with a bonding pad; forming a patterned mask layer on the substrate; forming an opening on the mask layer; depositing a conductive layer in the opening; forming a cap layer on the conductive layer, and removing the mask layer. The cap layer forming step allows the contacting area between the cap layer and the conductive layer to be substantially equal to the top surface area of the conductive layer by reflowing solder material prior to the removal of the mask layer.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
       1. A method of providing a semiconductor structure, the method comprising the steps of:
 providing a substrate with at least a bonding pad on the substrate; 
 forming a patterned mask layer on the substrate, wherein the patterned mask layer includes an opening which exposes at least a part of the bonding pad; 
 depositing a conductive layer in the opening, wherein a height difference exists between a top surface of the conductive layer and a top surface of the adjacent mask layer, and the top surface of the conductive layer is lower than the top surface of the adjacent mask layer; and wherein a ratio of the height difference and a thickness of the mask layer is controlled to be in a range of from ¼ to ½; 
 forming a cap layer on the conductive layer, wherein the cap layer is a solder layer, wherein forming the cap layer comprises a reflowing step; and 
 removing the patterned mask layer; 
 wherein the cap layer forming step allows a contacting area between the cap layer and the conductive layer to be substantially equal to the top surface area of the conductive layer; 
 wherein forming the cap layer comprises a disposing step which is random spraying, and the reflowing step is subsequent to the disposing step; 
 wherein the random spraying comprises positioning a plurality of solder balls on the conductive layer. 
 
     
     
       2. The method as in  claim 1 , further comprising a step of forming an under bump metallization (UBM) layer. 
     
     
       3. The method as in  claim 2 , wherein the UBM layer is formed by sputtering, vapor deposition, or printing. 
     
     
       4. The method as in  claim 2 , further comprising a step of removing the UBM layer. 
     
     
       5. The method as in  claim 1 , wherein the height difference is in a range of from ¼ to ⅓ of the thickness of the mask layer. 
     
     
       6. The method as in  claim 1 , wherein the conductive layer is formed by materials selected from the group of nickel, copper, gold, and the combination thereof. 
     
     
       7. A method of providing a semiconductor structure, the method comprising the steps of:
 providing a substrate with at least a bonding pad on the substrate; 
 forming a patterned mask layer on the substrate, wherein the patterned mask layer includes an opening which exposes at least a part of the bonding pad; 
 depositing a conductive layer in the opening, wherein a height difference exists between a top surface of the conductive layer and a top surface of the adjacent mask layer, and the top surface of the conductive layer is lower than the top surface of the adjacent mask layer; 
 forming a cap layer on the conductive layer, wherein the cap layer is a solder layer, wherein forming the cap layer comprises a reflowing step; and 
 removing the patterned mask layer; 
 wherein the cap layer forming step allows a contacting area between the cap layer and the conductive layer to be substantially equal to the top surface area of the conductive layer; 
 wherein forming the cap layer comprises a disposing step which can be ball dropping, random spraying, solder paste spreading, or the combination thereof; 
 wherein the removing step can be achieved concomitantly with the reflowing step under an elevated temperature treatment. 
 
     
     
       8. The method as in  claim 7 , further comprising a step of forming an under bump metallization (UBM) layer. 
     
     
       9. The method as in  claim 8 , wherein the UBM layer is formed by sputtering, vapor deposition, or printing. 
     
     
       10. The method as in  claim 8 , further comprising a step of removing the UBM layer. 
     
     
       11. The method as in  claim 7 , wherein the height difference is in a range of from about ¼ to about ⅓ of the thickness of the mask layer. 
     
     
       12. The method as in  claim 7 , wherein the conductive layer is formed by materials selected from the group of nickel, copper, gold, and the combination thereof. 
     
     
       13. The method as in  claim 7 , wherein the reflowing step is subsequent to the disposing step. 
     
     
       14. A method of providing a semiconductor structure, the method comprising the steps of:
 providing a substrate with at least a bonding pad on the substrate; 
 forming a patterned mask layer on the substrate, wherein the patterned mask layer includes an opening which exposes at least a part of the bonding pad; 
 depositing a conductive layer in the opening, wherein a height difference exists between a top surface of the conductive layer and a top surface of the adjacent mask layer, and the top surface of the conductive layer is lower than the top surface of the adjacent mask layer; 
 forming a cap layer on the conductive layer; and 
 removing the patterned mask layer; 
 wherein the cap layer forming step allows a contacting area between the cap layer and the conductive layer to be substantially equal to the top surface area of the conductive layer; 
 wherein forming the cap layer comprises a disposing step which is random spraying, and a reflowing step is subsequent to the disposing step; 
 wherein the random spraying comprises positioning a plurality of solder balls on the conductive layer. 
 
     
     
       15. A method of providing a semiconductor structure, the method comprising the steps of:
 providing a substrate with at least a bonding pad on the substrate; 
 forming a patterned mask layer on the substrate, wherein the patterned mask layer includes an opening which exposes at least a part of the bonding pad; 
 depositing a conductive layer in the opening, wherein a height difference exists between a top surface of the conductive layer and a top surface of the adjacent mask layer, and the top surface of the conductive layer is lower than the top surface of the adjacent mask layer; 
 forming a cap layer on the conductive layer; and 
 removing the patterned mask layer; 
 wherein the cap layer forming step allows a contacting area between the cap layer and the conductive layer to be substantially equal to the top surface area of the conductive layer; 
 wherein forming the cap layer comprises a reflowing step; 
 wherein the removing step can be achieved concomitantly with the reflowing step under an elevated temperature treatment.

Join the waitlist — get patent alerts

Track US9023727B2 — get alerts on status changes and closely related new filings.

We store only your email — no account needed. See our privacy policy.