Low voltage PNPN protection device
Abstract
A low voltage protection device that includes a silicon substrate comprises an inner layer of a first dopant type. The device also includes a first outer layer of a second dopant type disposed adjacent a first surface of the inner layer and a second outer layer of the second dopant type disposed adjacent a second surface of the inner layer opposite the first surface. The device further includes a first mesa region disposed in a peripheral region of a first side of the low voltage protection device. The first mesa region includes a first area that includes a peripheral portion of a cathode of the low voltage protection device, the cathode formed by diffusing a high concentration of dopant species of the first type on a first surface of the silicon substrate, and a second area comprising a high concentration of diffused dopant species of the second type.
Claims
exact text as granted — not AI-modified1. A low voltage protection device that includes a silicon substrate, comprising:
an inner layer of a first dopant type;
a first outer layer of a second dopant type disposed adjacent a first surface of the inner layer;
a second outer layer of the second dopant type disposed adjacent a second surface of the inner layer opposite the first surface; and
a first mesa region disposed in a peripheral region of a first side of the low voltage protection device, the first mesa region comprising:
a first area that includes a peripheral portion of a cathode of the low voltage protection device, the cathode formed by diffusing a high concentration of dopant species of the first type on a first surface of the silicon substrate; and
a second area comprising a high concentration of diffused dopant species of the second type.
2. The device of claim 1 , wherein the inner layer and first and second outer layers comprise an N type region and first and second P type regions, respectively.
3. The device of claim 1 , further comprising a deep diffusion region comprising dopant species of the first type, the deep diffusion region extending from a surface of the first mesa region to the inner layer of the first dopant type.
4. The device of claim 1 , wherein a central portion of the cathode comprises an opening wherein a first portion of the first outer layer of the second dopant type extends through the opening.
5. The device of claim 1 , further comprising a back layer disposed on a second side of the device opposite the first side, the back layer containing a high concentration of diffused dopant species of the second type.
6. The device of claim 1 , further comprising a second mesa region adjacent to the first mesa region, a lower portion of the second mesa region extending into the inner layer of the first dopant type.
7. The device of claim 6 , the first mesa region comprising a shallow mesa and the second mesa region comprising a deep mesa.
8. The device of claim 6 , the cathode extending over at least a portion of a surface of both the first and second mesa regions, wherein the cathode contacts the inner layer of the first dopant type.
9. The device of claim 1 , wherein the device comprises a breakdown diode whose breakdown region is defined by an interface of the first and second areas of the first mesa region.
10. The device of claim 2 , wherein a thickness of the P type regions is about 10-100 μm.
11. The device of claim 3 , wherein the first mesa region is disposed circumferentially around a central portion of the cathode, and wherein the peripheral portion of the cathode includes multiple regions that define multiple breakdown regions.
12. The device of claim 1 , wherein the device comprises a bi-directional device, wherein a second cathode is disposed on a second surface of the silicon substrate.
13. The device of claim 1 , wherein the device is passivated with a glass material.
14. A low voltage PNPN protection device, comprising:
an N doped silicon slice;
a first P doped layer defining a first interface with the N doped silicon slice;
a second P doped layer defining a second interface with the N-doped silicon slice opposite the first interface;
a cathode disposed on a first side of the device over a portion of an outer surface of the first p doped layer; and
a first mesa disposed on the first side of the device, wherein a surface of the mesa extends into the N-doped silicon slice, and wherein the first mesa includes a P doped region and an N doped region that define a breakdown junction of a breakdown diode.
15. The device of claim 14 , wherein the P doped region and N doped region are formed by diffusion.
16. The device of claim 14 , further comprising a second mesa that overlaps the first mesa, the second mesa being deeper than the first mesa, wherein the second mesa includes an additional N doped region that extends into the N doped silicon slice.Join the waitlist — get patent alerts
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