Memory system and computer system

Abstract

A memory system according to the present invention includes, in addition to an computing device, a plurality of first blocks that are provided to store information including user information, and first physical addresses not overlapping one another are assigned to, respectively, and a plurality of second blocks that are provided to store first physical addresses of initial defect blocks out of the plurality of first blocks, respectively, wherein the computing device finds the first physical address corresponding a inputted given logical address, based on a given mirror logical address corresponding to the given logical address, and information stored in the second blocks.

1. A memory system comprising:
 a plurality of first blocks that store information including user information, wherein first physical addresses that do not overlap one another are respectively assigned to the plurality of first blocks; 
 a plurality of second blocks that respectively store first physical addresses of initial defect blocks out of said plurality of first blocks; 
 a plurality of user information blocks, out of said plurality of first blocks, that store said user information; 
 a plurality of duplicated user information blocks, out of said plurality of first blocks, that each store a duplicate of said user information; and 
 a computing device that finds a first physical address corresponding to a given logical address that provides access to a user information block, wherein 
 said computing device has, as information, mirror logical addresses for accessing said plurality of duplicated user information blocks, any one of the mirror logical addresses having a one-on-one correspondence relationship with the given logical address, 
 said computing device finds said first physical address corresponding to said given logical address based on said given logical address and the information stored in said second blocks, determines whether or not a first block specified by the found first physical address is a tentative late defective block and, when it is determined that said first block is said tentative late defective block, finds said first physical address corresponding to said given logical address again, based on said given mirror logical address corresponding to said given logical address and the information stored in said second blocks, 
 second physical addresses that do not overlap one another are respectively assigned to said plurality of second blocks, 
 said first physical addresses of said initial defect blocks stored in said plurality of second blocks are stored in said plurality of second blocks in the order of said second physical addresses in accordance with the order of said first physical addresses, 
 said computing device, when finding said first physical address corresponding to said given logical address again, based on the given mirror logical address corresponding to said given logical address and the information stored in said second blocks, 
 (A) searches a target block from said plurality of second blocks using said given mirror logical address; 
 (B) finds a number of the plurality of first blocks, existing before a first physical address of an initial defect block read from said target block, other than said initial defect blocks, based on said first physical address of said initial defect block read from said target block, and said second physical address of said target block; and 
 (C) finds said first physical address corresponding to said given logical address, based on said given mirror logical address and said number. 
 
     
     
       2. A memory system comprising:
 a plurality of first blocks that store information including user information, wherein first physical addresses that do not overlap one another are respectively assigned to the plurality of first blocks; 
 a plurality of second blocks that respectively store first physical addresses of initial defect blocks out of said plurality of first blocks; 
 a plurality of user information blocks, out of said plurality of first blocks, that store said user information; 
 a plurality of duplicated user information blocks, out of said plurality of first blocks, that each store a duplicate of said user information; 
 a computing device that finds a first physical address corresponding to a given logical address that provides access to a user information block; and 
 a plurality of third blocks, wherein 
 said computing device has, as information, mirror logical addresses for accessing said plurality of duplicated user information blocks, any one of the mirror logical addresses having a one-on-one correspondence relationship with the given logical address, 
 said computing device finds said first physical address corresponding to said given logical address based on said given logical address and the information stored in said second blocks, determines whether or not a first block specified by the found first physical address is a tentative late defective block and, when it is determined that said first block is said tentative late defective block, finds said first physical address corresponding to said given logical address again, based on said given mirror logical address corresponding to said given logical address and the information stored in said second blocks, 
 the plurality of third blocks are provided to respectively store said first physical addresses of tentative late defective blocks out of said plurality of first blocks, and 
 said computing device records, when said first block is determined to be said tentative late defective block, said first physical address of said first block in a third block. 
 
     
     
       3. The memory system according to  claim 2 , wherein said computing device
 repairs said first block determined to be said tentative late defective block, using information in said duplicated user information block corresponding to the first block. 
 
     
     
       4. The memory system according to  claim 3 , wherein said computer device transfers, when determining that said first block is beyond repair as a result of said repair, first physical address information of said first block determined to be beyond repair from said third block to a management area made up of a part of said plurality of first blocks as information relating to a permanent late defective block. 
     
     
       5. The memory system according to  claim 2 , wherein said plurality of said second blocks and said plurality of third blocks are held in a volatile memory. 
     
     
       6. A memory system comprising:
 a plurality of first blocks that store information including user information, wherein first physical addresses that do not overlap one another are respectively assigned to the plurality of first blocks; 
 a plurality of second blocks that respectively store first physical addresses of initial defect blocks out of said plurality of first blocks; 
 a plurality of user information blocks, out of said plurality of first blocks, that store said user information; 
 a plurality of duplicated user information blocks, out of said plurality of first blocks, that each store a duplicate of said user information; 
 a computing device that finds a first physical address corresponding to a given logical address that provides access to a user information block; and 
 a plurality of fourth blocks, wherein 
 said computing device has, as information, mirror logical addresses for accessing said plurality of duplicated user information blocks, any one of the mirror logical addresses having a one-on-one correspondence relationship with the given logical address, 
 said computing device finds said first physical address corresponding to said given logical address based on said given logical address and the information stored in said second blocks, determines whether or not a first block specified by the found first physical address is a tentative late defective block and, when it is determined that said first block is said tentative late defective block, finds said first physical address corresponding to said given logical address again, based on said given mirror logical address corresponding to said given logical address and the information stored in said second blocks, 
 the plurality of fourth blocks are provided to respectively store first physical addresses of permanent late defective blocks out of said plurality of first blocks, 
 said computing device determines whether or not said first physical address found again based on said given mirror logical address corresponding to said given logical address and the information stored in said second blocks matches information stored in said fourth blocks, 
 fourth physical addresses not overlapping one another are respectively assigned to said fourth blocks, and 
 when determining that said first physical address found again based on said given mirror logical address corresponding to said given logical address and the information stored in said second blocks matches the information stored in said fourth blocks, said computing device finds an alternate logical address based on a fourth physical address of a fourth block storing said first physical address and a leading alternate logical address prepared in advance, and finds said first physical address corresponding to said given logical address based on said alternate logical address and the information stored in said second blocks. 
 
     
     
       7. The memory system according to  claim 6 , wherein said first physical addresses of said permanent late defective blocks stored in said fourth blocks are stored in said fourth blocks in the order of said fourth physical addresses in accordance with the order of occurrence of permanent late defects.