Fan controlling circuit

Abstract

A fan controlling circuit is provided. The fan controlling circuit includes an integral unit, an operational amplifier, and an output unit. The integral unit transforms pulse width modulation signals to voltages, and then the output unit outputs one of the pulse width modulation signals having a higher operation frequency according to the comparison result between the voltages. As the fan controlling circuit may be constituted with discrete elements and use a same voltage source as fans, the design cost and complexity are reduced.

1. A fan controlling circuit, for controlling a rotating speed of fans, comprising:
 an integral unit, for receiving a first pulse width modulation (PWM) signal and a second PWM signal, and outputting a first voltage corresponding to an operation frequency of the first PWM signal and a second voltage corresponding to an operation frequency of the PWM signal, the integral unit comprising: 
 a first integral circuit, for receiving the first PWM signal, and outputting the first voltage to a negative input terminal of the first operational amplifier, the first integral circuit comprising: 
 an n-channel metal-oxide-semiconductor (NMOS) transistor, wherein a drain of the NMOS transistor is coupled to a first resistor, a source of the NMOS transistor is coupled to a ground terminal, a gate of the NMOS transistor is coupled to a second resistor, and another end of the second resistor is coupled to the first PWM signal; and 
 a third resistor, serially connected to a capacitor, and another end of the third resistor coupled to a voltage source, wherein another end of the capacitor is coupled to the ground terminal, and another end of the first resistor is coupled to a common node of the third resistor and the capacitor; 
 wherein the common node of the third resistor and the capacitor outputs the first voltage; 
 a first operational amplifier, coupled to an output of the integral unit, for comparing the first voltage and the second voltage; and 
 an output unit, coupled to an output terminal of the first operational amplifier, and the first PWM signal and the second PWM signal, and outputting one of the first PWM signal and the second PWM signal according to the output of the first operational amplifier to control the fans. 
 
     
     
       2. The fan controlling circuit according to  claim 1 , wherein the integral unit comprises:
 a second integral circuit, for receiving the second PWM signal, and outputting the second voltage to a positive input terminal of the first operational amplifier. 
 
     
     
       3. The fan controlling circuit according to  claim 2 , wherein the second integral circuit comprises:
 an NMOS transistor, wherein a drain of the NMOS transistor is coupled to a first resistor, a source of the NMOS transistor is coupled to a ground terminal, a gate of the NMOS transistor is coupled to a second resistor, and another end of the second resistor is coupled to the second PWM signal; and 
 a third resistor, serially connected to a capacitor, and another end of the third resistor coupled to a voltage source, wherein another end of the capacitor is coupled to the ground terminal, and another end of the first resistor is coupled to a common node of the third resistor and the capacitor; 
 wherein the common node of the third resistor and the capacitor outputs the second voltage. 
 
     
     
       4. The fan controlling circuit according to  claim 1 , wherein the output unit comprises:
 a second operational amplifier, wherein a negative input terminal of the second operational amplifier is coupled to a first resistor, and another end of the first resistor is coupled to the output terminal of the first operational amplifier; 
 a second resistor, coupled between an output terminal of the second operational amplifier and the negative input terminal of the second operational amplifier; 
 a first p-channel metal-oxide-semiconductor (PMOS) transistor, wherein a drain of the first PMOS transistor is coupled to the first PWM signal, a source of the first PMOS transistor is coupled to an output terminal of the output unit, and a gate of the first PMOS transistor is coupled to the output terminal of the first operational amplifier; and 
 a second PMOS transistor, wherein a drain of the second PMOS transistor is coupled to the second PWM signal, a source of the second PMOS transistor is coupled to the output terminal of the output unit, and a gate of the second PMOS transistor is coupled to the output terminal of the second operational amplifier; 
 wherein a positive input terminal of the second operational amplifier is coupled to the ground terminal.