Oscillation circuit

Abstract

A differential oscillation circuit according to the present invention is a differential oscillation circuit including a feedback loop circuit. The differential oscillation circuit includes: delay, circuits, cascade-connected one after another on the feedback loop circuit, each delay circuit configured to delay paired differential input signals which the delay circuit receives, and to output the delayed differential signals as paired differential output signals; and an oscillation activation detector circuit configured to detect whether the oscillation circuit is in an oscillation activation state or in a stable state, and to output a detection signal indicating a result of the detection. Furthermore, on the basis of the detection signal outputted from the oscillation activation detector circuit, each of the delay circuits controls output current values of the differential output signals. This circuit configuration enables the speeding up of the oscillation frequency of the circuit.

1. A differential oscillation circuit including a feedback loop circuit, comprising:
 delay circuits, cascade-connected one after another on the feedback loop circuit, each delay circuit configured to delay paired differential input signals which the delay circuit receives, and to output the delayed differential signals as paired differential output signals; 
 an oscillation activation detector circuit configured to detect whether the oscillation circuit is in an oscillation activation state or in a stable state, and to output a detection signal indicating a result of the detection, 
 wherein, on a basis of the detection signal outputted from the oscillation activation detector circuit, each of the delay circuits controls output current values of the differential output signals; and 
 an oscillation stop detector circuit configured to detect that the oscillation circuit stops its oscillation, and to output a reset signal, 
 wherein on a basis of the reset signal, the oscillation activation detector circuit outputs a detection result as the detection signal, the detection result indicating that the oscillation circuit is in the oscillation activation state. 
 
     
     
       2. The oscillation circuit according to  claim 1 , wherein a delay circuit of said delay circuits includes:
 a pair of first and second inverters configured to invert the respective differential input signals, and to output the respective inverted differential signals; 
 a first transistor connected between an output node of the first inverter and a power supply voltage terminal, on and off of the first transistor controlled on a basis of a voltage of an output node of the second inverter; 
 a second transistor connected between the output node of the second inverter and the power supply voltage terminal, on and off of the second transistor controlled on a basis of a voltage of the output node of the first inverter; and 
 a switch circuit connected in series to the first transistor between the output node of the first inverter and the power supply voltage terminal, and connected in series to the second transistor between the output node of the second inverter and the power supply voltage terminal, on and off of the switch circuit controlled on a basis of the detection signal. 
 
     
     
       3. The oscillation circuit according to  claim 2 , wherein
 when the oscillation circuit is in the oscillation activation state, the switch circuit of the delay circuit is controlled so that the switch circuit is turned on, in accordance with the detection signal, and 
 when the oscillation circuit is in the stable state, the switch circuit of the delay circuit is controlled so that the switch circuit is turned off, in accordance with the detection signal. 
 
     
     
       4. The oscillation circuit according to  claim 2 , wherein
 the delay circuit further includes: 
 a third transistor connected between the output node of the first inverter and the power supply voltage terminal, on and off of the third transistor controlled on a basis of the voltage of the output node of the second inverter, the third transistor having a larger on-resistance than the first transistor; and 
 a fourth transistor connected between the output node of the second inverter and the power supply voltage terminal, on and off of the fourth transistor controlled on a basis of the voltage of the output node of the first inverter, the fourth transistor having a larger on-resistance than the second transistor. 
 
     
     
       5. The oscillation circuit according to  claim 2 , wherein
 the switch circuit includes: 
 a first switch element connected to the first transistor in series, on and off of the first switch element controlled in accordance with the detection signal; and 
 a second switch element connected to the second transistor in series, on and off of the second switch element controlled in accordance with the detection signal. 
 
     
     
       6. The oscillation circuit according to  claim 5 , wherein
 the power supply voltage terminal comprises a low-potential power supply voltage terminal, and 
 each of the first to fourth transistors and the first to second switch elements comprises an N-channel MOS transistor. 
 
     
     
       7. The oscillation circuit according to  claim 5 , wherein the power supply voltage terminal comprises a high-potential power supply voltage terminal, and
 each of the first to fourth transistors and the first to second switch elements comprises a P-channel MOS transistor.