Control loop for switching power converters

Abstract

A pulse regulation loop for a clocked switching power converter where the loop is around a bridge converter. The loop features a comparator, a charge pump and a filter in series, feeding a pulse modulator controlling the clock duty cycle of the bridge. Ripple in the bridge converter output is feed to the comparator which causes the charge pump to inject or remove charge from the filter at the clock rate providing control over the modulator that establishes converter efficiency. The charge pump is of the PLL type, having switches responsive to voltage output from the comparator, evaluating the converter ripple relative to a reference voltage.

1. A voltage regulator for use with switching power converters comprising
 a non-linear detection circuit having a reference voltage connected to a first input, and a signal representative of an output voltage connected to a second input, and outputting a first logic signal if the first input is greater than the second input, and a second logic signal if the second input is greater than the first input, 
 a conversion circuit for continuously converting the output of the detection circuit to charge, and 
 a filter continuously connected to an output of the conversion circuit and outputting a control signal adapted to control the duty cycle of either a pulsewidth modulator or a pulse frequency modulator for linearizing the non-linear response of the detection circuit to cause the voltage applied to a load to be substantially constant. 
 
     
     
       2. A voltage regulator for use with switching power converters comprising
 a non-linear detection circuit having a reference voltage connected to a first input, and a signal representative of an output voltage connected to a second input, and outputting a first logic signal if the first input is greater than the second input, and a second logic signal if the second input is greater than the first input, 
 a conversion circuit for continuously converting the output of the detection circuit to current, and 
 a filter continuously connected to an output of the conversion circuit and outputting a control signal adapted to control the duty cycle of either a pulsewidth modulator or a pulse frequency modulator for linearizing the non-linear response of the detection circuit to cause the voltage applied to a load to be substantially constant. 
 
     
     
       3. The voltage regulator of  claim 1  wherein the detection circuit is a voltage comparator. 
     
     
       4. The voltage regulator of  claim 2  wherein the detection circuit is a voltage comparator. 
     
     
       5. The voltage regulator of  claim 1  wherein the conversion circuit is a charge pump. 
     
     
       6. The voltage regulator of  claim 2  wherein the conversion circuit is a charge pump. 
     
     
       7. A voltage regulator for use with switching power converters comprising
 a non-linear detection circuit comprising a voltage comparator having a reference voltage connected to a first input, and a signal representative of an output voltage connected to a second input, and outputting a first logic signal if the first input is greater than the second input, and a second logic signal if the second input is greater than the first input, 
 a conversion circuit comprising a charge pump for continuously converting the output of the detection circuit to charge, and 
 a filter connected to an output of the conversion circuit and outputting a control signal adapted to control the duty cycle of either a pulsewidth modulator or a pulse frequency modulator for linearizing the non-linear response of the detection circuit to cause the voltage applied to a load to be substantially constant. 
 
     
     
       8. A voltage regulator for use with switching power converters comprising
 a non-linear detection circuit having a reference voltage connected to a first input, and a signal representative of an output voltage connected to a second input, and outputting a first logic signal if the first input is greater than the second input, and a second logic signal if the second input is greater than the first input, 
 a conversion circuit for continuously converting the output of the detection circuit to charge, and 
 a filter connected to the output of the conversion circuit and outputting a control signal adapted to control the duty cycle of either a pulsewidth modulator or a pulse frequency modulator for linearizing the non-linear response of the detection circuit to cause the voltage applied to a load to be substantially constant at a voltage lower than a supply voltage. 
 
     
     
       9. A voltage regulator for use with switching power converters comprising
 a non-linear detection circuit having a reference voltage connected to a first input, and a signal representative of an output voltage connected to a second input, and outputting a first logic signal if the first input is greater than the second input, and a second logic signal if the second input is greater than the first input, 
 a conversion circuit for continuously converting the output of the detection circuit to current, and 
 a filter connected to the output of the conversion circuit and outputting a control signal adapted to control the duty cycle of either a pulsewidth modulator or a pulse frequency modulator for linearizing the non-linear response of the detection circuit to cause the voltage applied to a load to be substantially constant at a voltage less than a supply voltage. 
 
     
     
       10. The voltage regulator of  claim 1  wherein the voltage applied to a load is less than the reference voltage. 
     
     
       11. The voltage regulator of  claim 2  wherein the voltage applied to a load is less than the reference voltage. 
     
     
       12. The voltage regulator of  claim 1  wherein the voltage applied to a load is greater than a supply voltage. 
     
     
       13. The voltage regulator of  claim 2  wherein the voltage applied to a load is greater than a supply voltage. 
     
     
       14. The voltage regulator of  claim 8  wherein the conversion circuit continuously converts the output of the detection circuit to charge. 
     
     
       15. The voltage regulator of  claim 9  wherein the conversion circuit continuously converts the output of the detection circuit to current. 
     
     
       16. The voltage regulator of  claim 1  wherein output ripple is reduced. 
     
     
       17. The voltage regulator of  claim 2  wherein output ripple is reduced. 
     
     
       18. A method for reducing ripple in a DC-to-DC conversion circuit comprising the steps of
 outputting as a first stage output signal a first logic signal if a reference signal is greater than an output voltage, 
 outputting as the first stage output signal a second logic signal if the reference signal is less than the output voltage, 
 continuously converting the first stage output signal to charge as a charge output, and 
 filtering the charge output and outputting a linearized control signal adapted to control the duty cycle of either a pulsewidth modulator or a pulse frequency modulator to cause the output voltage applied to a load to be substantially constant. 
 
     
     
       19. A method for reducing ripple in a DC-to-DC conversion circuit comprising the steps of
 outputting as a first stage output signal a first logic signal if a reference signal is greater than an output voltage, 
 outputting as the first stage output signal a second logic signal if the reference signal is less than the output voltage, 
 converting the first stage output signal to charge as a charge output during steady state operation, and 
 filtering the charge output and outputting a linearized control signal for controlling the duty cycle of either a pulsewidth modulator or a pulse frequency modulator to cause the output voltage applied to a load to be substantially constant at a voltage less than a supply voltage. 
 
     
     
       20. A method for reducing ripple in a DC-to-DC conversion circuit comprising the steps of
 outputting as a first stage output signal a first logic signal if a reference signal is greater than an output voltage, 
 outputting as the first stage output signal a second logic signal if the reference signal is less than the output voltage, 
 continuously converting the output signal to current as a conversion output, and 
 filtering the conversion output and outputting a linearized control signal adapted to control the duty cycle of either a pulsewidth modulator or a pulse frequency modulator to cause the output voltage applied to a load to be substantially constant. 
 
     
     
       21. A method for reducing ripple in a DC-to-DC conversion circuit comprising the steps of
 outputting as a first stage output signal a first logic signal if a reference signal is greater than an output voltage, 
 outputting as the first stage output signal a second logic signal if the reference signal is less than the output voltage, 
 converting either the first logic signal or the second logic signal to current as a conversion output during steady state operation, and 
 filtering the conversion output and outputting a linearized control signal adapted to control the duty cycle of either a pulsewidth modulator or a pulse frequency modulator to cause the output voltage applied to a load to be substantially constant at a voltage less than a supply voltage.