Circuit for sample rate conversion

Abstract

The present invention is related to a circuit for converting the sample rate of a digital signal, comprising an input for applying the digital signal, a conversion filter having either a symmetrical or anti-symmetrical impulse response and implemented as a plurality of subfilters in parallel, each subfilter having a symmetrical or anti-symmetrical response derived from components of a polyphase decomposition of said impulse response, combining means for deriving from said applied digital signal input signals of said plurality of subfilters or for combining output signals of said plurality of subfilters into a digital signal with converted sample rate, an output for outputting said digital signal with converted sample rate.

1. Circuit for converting the sample rate of a digital signal, the circuit comprising an integer factor sample rate conversion circuit, wherein the benefits of a symmetrical or asymmetrical impulse response on the one hand and those of a polyphase realization on the other hand are combined, the circuit further comprising
 an input for applying said digital signal, 
 a conversion filter having either a symmetrical or anti-symmetrical impulse response and a polyphase realization, the conversion filter implemented as a plurality of subfilters in parallel, each subfilter having a symmetrical or anti-symmetrical response derived from a combination of the conversion filter polyphase components, the combination including multiplying the digital signal only with factors of 1 and −1, 
 combining means for combining said applied digital signal input signals of said plurality of subfilters or for combining output signals of said plurality of subfilters into a digital signal with converted sample rate, after multiplying the applied digital signal input signals of said plurality of subfilters or after multiplying the output signals of said plurality of subfilters, with factors 1 or ½, 
 an output for outputting said digital signal with converted sample rate. 
 
   
   
     2. A circuit for converting the sample rate of a digital signal, comprising:
 an input for applying said digital signal, 
 a conversion filter having either a symmetrical or anti-symmetrical impulse response and implemented as a plurality of subfilters in parallel, each subfilter having a symmetrical or anti-symmetrical response derived from components of a polyphase decomposition of said impulse response, 
 combining means for deriving from said applied digital signal input signals of said plurality of subfilters or for combining output signals of said plurality of subfilters into a digital signal with converted sample rate, and 
 an output for outputting said digital signal with converted sample rate, 
 wherein said combining means are arranged for combining and interpolating output signals of said subfilters, said combining means further comprising means for adding and multiplying signals. 
 
   
   
     3. Circuit for sample rate conversion as in  claim 2 , whereby said combining means are arranged for decimating said input digital signal and for combining input signals to said subfilters, and combining means further comprising means for adding and multiplying signals. 
   
   
     4. Circuit for sample rate conversion as in  claim 3 , further comprising adder means for summing output signals of said subfilters. 
   
   
     5. An integrated circuit comprising a circuit for sample rate conversion as in  claim 2 .