High speed signal processor
Abstract
A waveform acquisition system that captures and digitizes a wideband electrical signal through a bank of front end filters, frequency down converters, and conventional digitizers (A/D converters). A software algorithm reconstructs the composite input signal and applies the necessary corrections to remove the effects of hardware impairments. This approach is possible because it uses a class of filters that exhibit the quality of perfect waveform reconstruction, allowing signals whose spectral components overlap multiple filter bands, to be faithfully reconstructed. A calibration generator switched into the input port serves as a reference for quantifying and removing hardware errors. The channelized analog-to-digital converter (ADC) effectively multiplies the bandwidth and sampling rate of the conventional digitizer performance in a single channel by the number of channels in the system. The use of digital local oscillators enable a compact, low power, monolithic architecture.
Claims
exact text as granted — not AI-modified1. A high-speed signal processor which functions as a waveform acquisition system and a high-speed analog-to-digital converter, said processor comprising:
a filter system, comprising an M-band filter bank, for dividing an input signal into a series of adjacent frequency bands;
a frequency down converter for down converting one or more of the adjacent frequency bands, said frequency down converter comprising a single direct processing stage for each channel;
a digitizer for digitizing each frequency band output from said frequency down converter; and
a system for reconstructing the original input signal;
wherein the single stage direction conversion process for each channel is performed using a digital local oscillator and wherein the M-band filters in said M-band filter bank enable perfect reconstruction, meaning that the cascaded response of the M-band analysis filters followed by the synthesis filters produces an overall flat amplitude response and group delay across all frequencies, with mirror image roll-off at filter boundaries and with the amplitude at the filter boundaries nominally about 6.02 dB below the constant peak values.
2. The high-speed signal processor as recited in claim 1 , wherein said digital local oscillator functions to enable a capability to set the processor to a known state for serving as a reference for quantifying and removing hardware errors.
3. A method for processing signals, comprising:
dividing an input signal into a series of adjacent frequency bands using an M-band filter bank;
digitizing each frequency band;
down converting one or more of the adjacent frequency bands, the down converting step including steps of first mixing down the entire signal to an IF frequency with a single common local oscillator and then dividing the signal into a plurality of bands, each of which is then mixed to baseband using a digital local oscillator; and
reconstructing the original input signal.
4. A high-speed signal processor which functions as a waveform acquisition system and a high-speed analog-to-digital converter, said processor comprising:
a filter system, comprising an M-band filter bank, for dividing an input signal into a series of adjacent frequency bands;
a frequency down converter for down converting one or more of the adjacent frequency bands, said frequency down converter comprising two or more processing stages;
a digitizer for digitizing each frequency band output from said frequency down converter; and
a system for reconstructing the original input signal;
wherein the M-band filters in said M-band filter bank enable perfect reconstruction, meaning that the cascaded response of the M-band analysis filters followed by the synthesis filters produces an overall flat amplitude response and group delay across all frequencies, with mirror image roll-off at filter boundaries and with the amplitude at the filter boundaries nominally about 6.02 dB below the constant peak values.
5. A high-speed signal processor which functions as a waveform acquisition system and a high-speed analog-to-digital converter, said processor comprising:
a filter system for dividing an input signal into a series of adjacent frequency bands;
a frequency down converter for down converting one or more of the adjacent frequency bands;
a digitizer for digitizing each frequency band output from said frequency down converter; and
a system for reconstructing the original input signal;
wherein in said frequency converter the entire signal is first mixed down to an IF frequency with a single common local oscillator and then divided into a plurality of bands, each of which is then mixed to baseband using a digital local oscillator.
6. The high-speed signal processor as recited in claim 5 , wherein said filter system comprises an M-band filter bank.
7. The high-speed signal processor as recited in claim 6 , wherein the M-band filters in said M-band filter bank enable perfect reconstruction, meaning that the cascaded response of the M-band analysis filters followed by the synthesis filters produces an overall flat amplitude response and group delay across all frequencies, with mirror image roll-off at filter boundaries and with the amplitude at the filter boundaries nominally about 6.02 dB below the constant peak values.
8. The high-speed signal processor as recited in claim 6 , wherein the M-band filters in said M-band filter bank are implemented optically using fiber optics.
9. The high-speed signal processor as recited in claim 6 , wherein the M-band filters in said M-band filter bank are implemented electronically.
10. The high-speed signal processor as recited in claim 6 , wherein the M-band filters in said M-band filter bank are implemented using software.
11. The high-speed signal processor as recited in claim 6 , wherein each channel output is equalized, to thereby shape the transfer function of the channel into that of an M-band filter.
12. The high-speed signal processor as recited in claim 11 , wherein the channel equalization is implemented with Weiner filter technology.
13. The high-speed signal processor as recited in claim 5 , and further comprising a calibration signal which is continuously injected into said processor to serve as a reference for quantifying and removing hardware errors.
14. The high-speed signal processor as recited in claim 5 , wherein said digital local oscillator functions to enable a capability to set the processor to a known state for serving as a reference for quantifying and removing hardware errors.
15. The high-speed signal processor as recited in claim 5 , and further comprising a pulsed calibration signal which is injected into said processor in pulses to serve as a reference for quantifying and removing hardware errors.
16. The high-speed signal processor as recited in claim 5 , wherein said processor includes a capability to set the oscillators to a known state to serve as a reference for quantifying and removing hardware errors.
17. A high-speed signal processor which functions as a waveform acquisition system and a high-speed analog-to-digital converter, said processor comprising:
a filter system, comprising an M-band filter bank, for dividing an input signal into a series of adjacent frequency bands;
a digitizer for digitizing each frequency band output from said filter system; and
a system for reconstructing the original input signal;
wherein the M-band filters in said M-band filter bank enable perfect reconstruction, meaning that the cascaded response of the M-band analysis filters followed by the synthesis filters produces an overall flat amplitude response and group delay across all frequencies, with mirror image roll-off at filter boundaries and with the amplitude at the filter boundaries nominally about 6.02 dB below the constant peak values.Join the waitlist — get patent alerts
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