Nonvolatile semiconductor memory device and method for fabricating the same

Abstract

A nonvolatile semiconductor memory device includes: a gate dielectric made of a multilayer dielectric that is formed on a substrate and discretely accumulates charges; a gate electrode formed on the gate dielectric; a pair of diffusion regions formed in the surface of the substrate with the gate electrode interposed therebetween and serving as a source and a drain; and a channel region existing between the diffusion regions. At least one of regions of the gate dielectric located between the pair of diffusion regions and lateral end parts of the gate electrode opposed to the diffusion regions includes a fixed charge accumulation region in which charges produced by irradiating the gate electrode with ultraviolet light can be accumulated, and at least one said diffusion region located below the fixed charge accumulation region is formed to overlap with the fixed charge accumulation region in plan configuration and extend beyond the fixed charge accumulation region toward the middle of the channel region in plan configuration.

1. A nonvolatile semiconductor memory device comprising:
 a gate dielectric made of a multilayer dielectric that is formed on a substrate and discretely accumulates charges; 
 a gate electrode formed on the gate dielectric; 
 a pair of diffusion regions formed in the surface of the substrate with the gate electrode interposed therebetween and serving as a source and a drain; and 
 a channel region existing between the diffusion regions, 
 wherein at least one of regions of the gate dielectric located between the pair of diffusion regions and lateral end parts of the gate electrode opposed to the diffusion regions includes a fixed charge accumulation region in which charges produced by irradiating the gate electrode with ultraviolet light can be accumulated, and 
 at least one said diffusion region located below the fixed charge accumulation region is formed to overlap with the fixed charge accumulation region in plan configuration and extend beyond the fixed charge accumulation region toward the middle of the channel region in plan configuration. 
 
     
     
       2. The nonvolatile semiconductor memory device of  claim 1 , wherein
 a region of the gate dielectric opposed to the vicinity of the interface between the channel region and the at least one diffusion region is a region thereof in which charges are accumulated by a writing operation or a region thereof in which charges to be extracted by an erasing operation are accumulated. 
 
     
     
       3. The nonvolatile semiconductor memory device of  claim 1 , wherein
 the at least one diffusion region located below the fixed charge accumulation region and the gate electrode overlap each other by 60 nm or more in plan configuration. 
 
     
     
       4. The nonvolatile semiconductor memory device of  claim 1 , wherein
 the gate dielectric is made of a multilayer film obtained by successively stacking a silicon oxide film, a silicon nitride film and a silicon oxide film. 
 
     
     
       5. The nonvolatile semiconductor memory device of  claim 1 , wherein
 the gate electrode is made of polycrystalline silicon and has a thickness of 60 nm or more.