US7456491B2ExpiredUtilityA1

Large area electron emission system for application in mask-based lithography, maskless lithography II and microscopy

Assignee: PILLA SUBRAHMANYAM V SPriority: Jul 23, 2004Filed: Jul 22, 2005Granted: Nov 25, 2008
Est. expiryJul 23, 2024(expired)· nominal 20-yr term from priority
H01J 37/073H01J 2237/31788H01J 9/022H01J 1/308
72
PatentIndex Score
6
Cited by
18
References
62
Claims

Abstract

The present invention relates to a various systems for generating and directing electron flow, and related methods, manufacturing techniques and related componentry, such as can be used in lithography, microscopy and other applications. In one embodiment, the present invention involves a system that includes an electron source having a plurality of independently-actuatable emission surfaces each of which is capable of emitting electrons, and an optical column adjacent to the electron source through which the emitted electrons pass. The optical column includes a plurality of actuatable electrodes that are capable of influencing paths taken by the emitted electrons.

Claims

exact text as granted — not AI-modified
1. A diode structure capable of emitting electrons, the diode structure comprising:
 a first layer; 
 a second layer adjacent to the first layer, wherein the first and second layers form a diode junction; and 
 a third layer adjacent to at least one of the first and second layers, wherein the third layer is electrically insulative and thermally conductive, 
 wherein the third layer is at least indirectly in contact with a cooling device so that heat flows through the third layer away from the first and second layers, whereby the first and second layers are maintained within a temperature range that is substantially less than 100 degrees Kelvin. 
 
   
   
     2. The diode structure of  claim 1 , wherein the first and second layers are maintained within at a temperature that is substantially equal to 77 degrees Kelvin. 
   
   
     3. The diode structure of  claim 1 , wherein the third layer is a sapphire block layer, the cooling device is a thermal bath, and an additional base layer is positioned between the sapphire block layer and the thermal bath. 
   
   
     4. The diode structure of  claim 1 , wherein the third layer is adjacent to the second layer, the second layer is a silicon wafer, and the first layer is a porous layer. 
   
   
     5. The diode structure of  claim 4 , further comprising an additional layer adjacent to the first layer, wherein the additional layer is an electrode. 
   
   
     6. The diode structure of  claim 5 , wherein a voltage is applied between the electrode and at least one of the second layer and a fourth layer that is between the second and third layers and is in electrical communication with the second layer, and wherein application of the voltage causes the electrons to be emitted from at least one of the first layer and the electrode. 
   
   
     7. The diode structure of  claim 6 , wherein the voltage is pulsed over time, whereby a longevity of life of the diode structure is extended. 
   
   
     8. An electron source comprising the diode structure of  claim 1 , further comprising an electrode spaced apart from the diode structure, wherein the electrons emitted from the diode structure tend to proceed from the diode structure toward the electrode. 
   
   
     9. The electron source of  claim 8 , wherein the diode structure is placed in a partial vacuum of 5 torr or less of inert gas atmosphere. 
   
   
     10. The electron source of  claim 8 , wherein an accelerating voltage is experienced by the electrons proceeding from the diode structure toward the electrode, and wherein the accelerating voltage depends at least in part upon a voltage applied to the electrode. 
   
   
     11. An electron source comprising:
 a diode structure having an emission surface; and 
 a voltage source that applies periodically-repeating time-varying voltage levels across the diode structure, 
 wherein the periodically-repeating time-varying voltage levels during each of a plurality of periods include a first negative voltage level that is followed by a first positive voltage level that is followed by a second negative voltage level, 
 wherein at least one of the following is also true: 
 (a) substantially all of the electrons emitted from the emission surface have energies of less than 0.1 eV; 
 (b) the emission surface is a large-area surface of at least several hundred square cm in area; 
 (c) the electron source emits electrons from the emission surface substantially only during the first positive voltage level of each period, the first positive voltage level is maintained for approximately 20 milliseconds, and the amount of electrons emitted from the emission surface when the diode structure experiences the first positive voltage level varies at least partly in dependence upon each of the first positive voltage level and an accelerating voltage experienced by the electrons due at least in pan to an additional voltage applied to an electrode spaced apart from the emission surface; and 
 (d) the emission surface is divided into a plurality of surface protrusions, wherein each of the protrusions is separated from neighboring protrusions by at least one gap, and wherein at least one of the following is true:
 (i) at least some of the protrusions are arc-shaped radial elements; and 
 (ii) at least some of the protrusions are rectangular-shaped elements. 
 
 
   
   
     12. The electron source of  claim 11 , wherein the electron source emits electrons from the emission surface substantially only during the first positive voltage level of each period. 
   
   
     13. The electron source of  claim 12 , wherein the first positive voltage level is maintained for approximately 20 milliseconds, and wherein the amount of electrons emitted from the emission surface when the diode structure experiences the first positive voltage level varies at least partly in dependence upon each of the first positive voltage level and an accelerating voltage experienced by the electrons due at least in part to an additional voltage applied to an electrode spaced apart from the emission surface. 
   
   
     14. The electron source of  claim 11 , wherein at least 95% of the electrons emitted from the emission surface have energies of less than 0.1 eV, the at least 95% of the electrons being substantially all of the electrons. 
   
   
     15. The electron source of  claim 11 , wherein the emission surface is a large-area surface of at least two thousand square cm in area. 
   
   
     16. The electron source of  claim 11 , wherein the emission surface is at least one of a planar surface and a curved surface. 
   
   
     17. The electron source of  claim 11 , wherein the emission surface is divided into a plurality of surface protrusions, wherein each of the protrusions is separated from neighboring protrusions by at least one gap. 
   
   
     18. The electron source of  claim 17 , wherein at least some of the surface protrusions are independently actuatable such that it is possible to cause electrons to be emitted from a first of the surface protrusions without causing electrons to be emitted from a second of the surface protrusions. 
   
   
     19. The electron source of  claim 17 , wherein at least one of the following is true:
 at least some of the protrusions are arc-shaped radial elements; and 
 at least some of the protrusions are rectangular-shaped elements. 
 
   
   
     20. A system for generating and directing electron flow, the system comprising:
 an electron source having a plurality of independently-actuatable emission surfaces each of which is capable of emitting electrons; and 
 an optical column adjacent to the electron source through which the emitted electrons pass, wherein the optical column includes a plurality of actuatable electrodes that are capable of influencing paths taken by the emitted electrons. 
 
   
   
     21. The system of  claim 20 , wherein the plurality of actuatable electrodes includes at least one wire mesh electrode having a first surface that is oriented in a manner that is substantially perpendicular to the paths taken by the emitted electrons, and at least one other electrode having a second surface that is oriented in a manner that is substantially parallel to the paths taken by the emitted electrons. 
   
   
     22. The system of  claim 21 , wherein the first surface is at least one of a planar surface, a spherical surface, and an otherwise curved surface, and wherein the second surface is at least one of a planar surface, a conical surface, and a cylindrical surface. 
   
   
     23. The system of  claim 20 , wherein the plurality of independently-actuatable emission surfaces are positioned at different respective positions along an interior of a curved surface, wherein the optical column includes a first region that is substantially conical and extends from the curved surface to a first level and a second region that is at least partly cylindrical and extends from the first level to a second level. 
   
   
     24. The system of  claim 23 , wherein at least a portion of a substantially conical surface extending around the first region is formed by a first conical electrode, and at least one additional spherical electrode extends inward through the first region away from the conical electrode. 
   
   
     25. The system of  claim 24 , wherein additional conical electrodes are supported within the first region, the additional conical electrodes being positioned in a manner that is substantially coaxial in relation to the first conical electrode. 
   
   
     26. The system of  claim 23 , wherein at least a portion of a substantially cylindrical surface extending around the second region is formed by a first cylindrical electrode, and a plurality of wire mesh electrodes extend inward though the second region away from the first cylindrical electrode, wherein each of the plurality of wire mesh electrodes is selected from the group consisting of a planar wire mesh electrode, a spherical wire mesh electrode, and a spheroidal wire mesh electrode. 
   
   
     27. The system of  claim 26 , wherein at least one of an additional wire mesh electrode, an additional cylindrical electrode, and an additional rod-shaped electrode is supported within the second region in a manner that is electrically isolated from the first cylindrical electrode. 
   
   
     28. The system of  claim 23 , wherein the second level is a level at which a wafer is positioned, and wherein an outer surface of the second region is formed by at least one of multiple cylindrical surfaces of different diameters and a combination of one cylindrical surface and one surface of revolution. 
   
   
     29. The system of  claim 23 , wherein a third level exists in between the first and second levels within the second region, wherein it is possible to position a mask at the third level. 
   
   
     30. The system of  claim 29 , wherein it is possible both to position the mask at the third level to allow for mask-based lithography and to remove the mask to allow for maskless lithography in relation to a wafer positioned at the second level. 
   
   
     31. The system of  claim 20 , wherein the plurality of independently-actuatable emission surfaces are positioned at different respective positions along a planar surface, and wherein the optical column includes a first region that is at least partly cylindrical and extends from the planar surface to a first level. 
   
   
     32. The system of  claim 20 , wherein the plurality of actuatable electrodes are capable of influencing at least one of a radial position of a path taken by the emitted electrons, a cross-sectional area of at least a portion of a beam formed by the emitted electrons, and a crossover location of at least the portion of the beam. 
   
   
     33. The system of  claim 20 , wherein independent actuation of the independently-actuatable emission surfaces causes the generation of respective beamlets of the electrons. 
   
   
     34. The system of  claim 33 , wherein each of the emission surfaces is an arc-shaped radial elements, and each of the respective beamlets also is arc-shaped at least proximate to its respective emission surface. 
   
   
     35. The system of  claim 33 , wherein actuation of several of the emission surfaces causes the formation of a ring-shaped combination beamlet. 
   
   
     36. The system of  claim 33 , wherein actuation of the independently-actuatable emission surfaces allows for the creation of overall wide beams of the emitted electrons so as to perform wide-field projection lithography. 
   
   
     37. The system of  claim 20 , wherein the plurality of actuatable electrodes are operated so as to direct a plurality of beamlets created by the actuation of the different independently-actuatable emission surfaces toward an aperture within which a crossover of the beamlets occurs. 
   
   
     38. The system of  claim 37 , further comprising an electrostatic lens and a magnetostatic lens that further focus a resulting electron stream subsequent to the crossover within the aperture so as to generate a single collimated beam. 
   
   
     39. A microscopy device employing the collimated beam generated by the system of  claim 38  as a probe beam. 
   
   
     40. The microscopy device of  claim 39 , wherein the microscopy device is at least one of a scanning electron microscopy (SEM) device, an environmental SEM device, an electron microprobe analyser (EMPA), a low energy electron microscopy/diffraction (LEEM/LEED) device. 
   
   
     41. A device employing the single collimated beam of  claim 38 , wherein the device is at least one of a backward wave oscillator and a tool allowing for subnanometer alignment. 
   
   
     42. The system of  claim 20 , wherein the optical column includes at least one of a conical structure and a cylindrical structure having a plurality of electrically-conductive strips that follow respective substantially-linear paths along sides of the at least one structure, wherein each of the paths is within a respective plane passing through a central axis of the at least one structure, and wherein at least some of the electrically-conductive strips are electrically-isolated from neighboring ones of the electrically-conductive strips. 
   
   
     43. The system of  claim 42 , wherein the actuatable electrodes include the at least one structure and at least some of the electrically-conductive strips are independently-actuatable relative to others of the electrically-conductive strips. 
   
   
     44. The system of  claim 43 , wherein different voltages are applied to the different electrically-conductive strips so as to cause a rotation of a beamlet generated by at least one of the independently-actuatable emission surfaces as it passes through the at least one structure. 
   
   
     45. The system of  claim 43 , wherein the different voltages are applied to the different electrically-conductive strips so as to produce a variation in intensity along an arc length of a beamlet passing through the at least one structure. 
   
   
     46. The system of  claim 43 , wherein due to the variation in intensity in the beamlet, at least one pixel beamlet is produced, and wherein generation of the at least one pixel beamlet in combination with other pixel beamlets allows for a maskless lithography procedure to be performed in relation to a wafer positioned at a second end of the optical column opposite a first end of the optical column at which is positioned the electron source. 
   
   
     47. The system of  claim 43 , wherein the different electrically-conductive strips are coupled to adder circuits, wherein at least a portion of at least one of the adder circuits is surface-mounted on at least one of the strips, wherein each of the adder circuits includes a respective plurality of optical switching devices, and wherein at least some of the signals provided to some of the adder circuits are multiplexed, whereby the voltages applied to the strips can be rapidly changed. 
   
   
     48. The system of  claim 20 , wherein the optical column includes a mask level at which a mask is positioned within the optical column, and wherein the mask is at least one of a single mask and a combination mask formed by assembling a plurality of sub-masks to one another. 
   
   
     49. A complementary set of masks that are successively positioned at a mask level within the optical column of the system of  claim 20 , wherein a first of the masks includes a plurality first orifices, wherein a second of the masks includes a plurality of second orifices, wherein a first total area of the first orifices is at least ten times larger than a second total area of the second orifices, wherein exposure of a wafer by way of both of the first and second masks results in the wafer being exposed to electrons corresponding to a combination of the first and second orifices, and wherein substantially less dosage is required to illuminate the second orifices of the second mask than is required to illuminate the first orifices of the first mask. 
   
   
     50. A method manufacturing a chip-based device through the use of the system of  claim 20 , the method comprising:
 providing a library of masks concerning standardized features to be created on chip-based devices; 
 selecting at least one of the masks of the library; 
 installing the mask into the system; 
 performing mask-based lithography upon a wafer using the system incorporating the mask so that the standardized features are created on the wafer; 
 removing the mask from the system; and 
 performing maskless lithography upon the wafer so that special additional features are further created on the wafer, 
 wherein the wafer need not be physically moved during the performing of the mask-based lithography and the maskless lithography. 
 
   
   
     51. The method of  claim 20 , wherein the chip-based device is at least one of a microchip, a microcomputer, a microprocessor, a computer, a controller, an integrated circuit, an application-specific integrated circuit (ASIC), and a programmable logic device. 
   
   
     52. A wafer manufacturing apparatus employing a plurality of the systems of  claim 20 , the wafer manufacturing apparatus further comprising:
 a control device; 
 a memory device coupled to the control device; 
 a first communication network linking the control device with each of the different ones of the systems, wherein the first communication network communicates at least one of grey level control data and lens strip control data to each of the systems; and 
 a second set of communication links respectively coupled to different ones of the systems, wherein the respective communication links of the second set respectively communicate respective error control data to the respective systems. 
 
   
   
     53. The wafer manufacturing apparatus of  claim 52 , wherein the systems are grouped into a plurality of sets of the systems, and wherein mask alignment data is additionally communicated to the respective sets of the systems by way of a third set of communication links. 
   
   
     54. The system of  claim 20 , wherein at least one of a mask alignment, a wafer alignment, and a calibration process are accomplished using a pixellized MCP array positioned proximate a level of the mask. 
   
   
     55. A mask capable of being used to manufacture the diode structure of an electron source, the electron source comprising a diode structure having an emission surface and a voltage source that applies periodically-repeating time-varying voltage levels across the diode structure, wherein the periodically-repeating time-varying voltage levels during each of a plurality of periods include a first negative voltage level that is followed by a first positive voltage level that is followed by a second negative voltage level, the mask comprising:
 a plurality of arc-shaped orifices separated from one another by portions of the mask. 
 
   
   
     56. A method of manufacturing the electron source by way of the mask of  claim 55 , the method comprising:
 providing the mask; 
 overlaying the mask on a layer of a diode structure; 
 depositing metallic material onto the combination of the mask and the diode structure; and 
 removing the mask so as to reveal the diode structure with a plurality of arc-shaped surface protrusions. 
 
   
   
     57. An electron source comprising:
 a diode structure having an emission surface, the diode structure being at least partly formed from porous silicon; and 
 a voltage source that applies periodically-repeating time-varying voltage levels across the diode structure, 
 wherein the periodically-repeating time-varying voltage levels during each of a plurality of periods include a first negative voltage level that is followed by a first positive voltage level that is followed by a second negative voltage level, and wherein at least one of the following is also true: 
 (a) substantially all of the electrons emitted from the emission surface have energies of less than 0.1 eV; 
 (b) the emission surface is a large-area surface of at least several hundred square cm in area; and 
 (c) the electron source emits electrons from the emission surface substantially only during the first positive voltage level of each period, the first positive voltage level is maintained for approximately 20 milliseconds, and the amount of electrons emitted from the emission surface when the diode structure experiences the first positive voltage level varies at least partly in dependence upon each of the first positive voltage level and an accelerating voltage experienced by the electrons due at least in part to an additional voltage applied to an electrode spaced apart from the emission surface. 
 
   
   
     58. The electron source of  claim 57  wherein the electron source emits electrons from the emission surface substantially only during the first positive voltage level of each period. 
   
   
     59. An electron source comprising:
 a diode structure having an emission surface, the diode structure being at least partly formed from porous silicon; and 
 a voltage source that applies periodically-repeating time-varying voltage levels across the diode structure, 
 wherein the periodically-repeating time-varying voltage levels during each of a plurality of periods include a first negative voltage level that is followed by a first positive voltage level that is followed by a second negative voltage level, and wherein at least one of the following is true: 
 (a) at least 95% of the electrons emitted from the emission surface have energies of less than 0.1 eV; and 
 (b) the emission surface is a large-area surface of at least two thousand square cm in area. 
 
   
   
     60. The electron source of  claim 57  wherein at least one of the following is true:
 (a) the emission surface is at least one of a planar surface and a curved surface, and; 
 (b) the emission surface is divided into a plurality of surface protrusions, wherein each of the protrusions is separated from neighboring protrusions by at least one gap. 
 
   
   
     61. The electron source of  claim 59 , wherein the electron source emits electrons from the emission surface substantially only during the first positive voltage level of each period. 
   
   
     62. The electron source of  claim 59 , wherein at least one of the following is true:
 (a) the emission surface is at least one of a planar surface and a curved surface, and; 
 (b) the emission surface is divided into a plurality of surface protrusions, wherein each of the protrusions is separated from neighboring protrusions by at least one gap.

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