US7317441B2ExpiredUtilityA1

Constant current circuit, drive circuit and image display device

Assignee: MITSUBISHI ELECTRIC CORPPriority: Oct 9, 2002Filed: Jul 11, 2003Granted: Jan 8, 2008
Est. expiryOct 9, 2022(expired)· nominal 20-yr term from priority
Inventors:Youichi Tobita
G09G 2330/028G09G 2320/043G09G 2300/0408G09G 3/3283G09G 3/3291G09G 2300/0809G09G 2310/0254G09G 3/3688G09G 3/3241G09G 2310/027G05F 3/26G09G 3/36G09G 3/20
67
PatentIndex Score
9
Cited by
46
References
10
Claims

Abstract

A first amplifier circuit ( 132 ) included in a voltage generating circuit ( 114 ) includes a differential circuit formed of P-type TFT elements (P 101 , P 102 ) and N-type TFT elements (N 101 , N 102 ), a constant current circuit ( 150 a, 150 b ) and an N-type TFT element (N 103 ). Constant current circuit ( 150 a; 150 b ) includes a P-type TFT element (P 132 a ; P 132 b ), a capacitor (C 132 a ; C 132 b ), switches (S 104 a -S 106 a ; S 104 b -S 106 b ) and a resistance element (R 132 a ; R 132 b ). Capacitor (C 132 a ; C 132 b ) holds a voltage on a node ( 204; 208 ) in a voltage setting operation, and thus when a current is being supplied to the diode-connected P-type TFT element (P 132 a ; P 132 b ).

Claims

exact text as granted — not AI-modified
1. A drive circuit providing an output voltage in accordance with an input voltage comprising:
 a first transistor connected between a first power supply node and an output node; 
 a constant current circuit connected between said output node and a second power supply node; and 
 an offset compensating circuit compensating for an offset voltage occurring depending on a threshold voltage of said first transistor, wherein 
 said offset compensating circuit holds said offset voltage, and provides a first voltage produced by shifting said input voltage by said held offset voltage to a gate electrode of said first transistor; 
 said constant current circuit includes; 
 a second transistor connected between said output node and said second power supply node, and 
 a first voltage holding circuit holding a second voltage determined depending on a threshold voltage of said second transistor and provided for turning on said second transistor; 
 said second transistor receives on its gate electrode said second voltage, and passes a constant current through said first transistor connected to said output node; and 
 said first transistor receives on its gate electrode said first voltage provided from said offset compensating circuit, and provides an output voltage at the same potential as said input voltage to said output node. 
 
   
   
     2. The drive circuit according to  claim 1 , wherein
 said offset compensating circuit includes: 
 a second voltage holding circuit charged in a setting mode, and holding said offset voltage in an operation mode, and 
 a first switch circuit operating in said setting mode to connect to an input node a first node to which one end of said second voltage holding circuit and the gate electrode of said first transistor are connected, and to connect the other end of said second voltage holding circuit to said output node, and operating in said operation mode to isolate said first node and the other end of said second voltage holding circuit from said input node and said output node, respectively, and to connect said other end to said input node. 
 
   
   
     3. The drive circuit according to  claim 1 , wherein
 said constant current circuit further includes: 
 a current supply circuit supplying a current for setting said second voltage, and 
 a switch circuit isolating said second transistor from said output node, and connecting said first voltage holding circuit and said second transistor to said current supply circuit when said second voltage is set; and 
 said current supply circuit includes: 
 a voltage generating portion generating a gate voltage determined depending on a threshold voltage of a transistor forming said current supply circuit, and 
 a third transistor connected between a third power supply node and said second switch circuit, and receiving on its gate electrode said gate voltage generated by said voltage generating portion. 
 
   
   
     4. The drive circuit according to  claim 3 , wherein
 said voltage generating portion includes: 
 a plurality of enhancement transistors connected in series between said third power supply node and said second power supply node, and 
 a voltage dividing circuit connected in parallel to the enhancement transistor connected to said third power supply node, and having first and second resistances connected in series; and 
 the gate electrode of said third transistor is connected to a node connecting said first resistance to said second resistance. 
 
   
   
     5. A drive circuit providing an output voltage in accordance with an input voltage, comprising:
 a first transistor of a first conductivity type connected between a first power supply node and an output node; 
 a first constant current circuit connected between said output node and a second power supply node; 
 a level shift circuit receiving a first voltage, and providing a second voltage produced by shifting the received first voltage by a predetermined magnitude; and 
 an offset compensating circuit compensating for an offset voltage occurring depending on a threshold voltage of said first transistor of the first conductivity type, wherein 
 said level shift circuit includes: 
 a second constant current circuit connected between a third power supply node and a gate electrode of said first transistor of the first conductivity type, and 
 a first transistor of a second conductivity type connected between the gate electrode of said first transistor of the first conductivity type and a fourth power supply node, wherein 
 said offset compensating circuit holds a voltage difference between the threshold voltage of said first transistor of the first conductivity type and a threshold voltage of said first transistor of the second conductivity type, and provides, as said first voltage, a voltage produced by shifting said input voltage by said held voltage difference to a gate electrode of said first transistor of the second conductivity type; 
 said first constant current circuit includes: 
 a second transistor of the first conductivity type connected between said output node and said second power supply node, and 
 a first voltage holding circuit holding a third voltage determined depending on a threshold voltage of said second transistor of the first conductivity type and provided for turning on said second transistor of the first conductivity type; 
 said second transistor of the first conductivity type receives on its gate electrode said third voltage, and passes a constant current through said first transistor of the first conductivity type connected to said output node; 
 said second constant current circuit includes: 
 a second transistor of the second conductivity type connected between said third power supply node and the gate electrode of said first transistor of the first conductivity type, and 
 a second voltage holding circuit holding a fourth voltage determined depending on a threshold voltage of said second transistor of the second conductivity type and provided for turning on said second transistor of the second conductivity type; 
 said second transistor of the second conductivity type receives on its gate electrode said fourth voltage, and passes a constant current through said first transistor of the second conductivity type connected to the gate electrode of said first transistor of the first conductivity type; 
 said first transistor of the second conductivity type receives on its gate electrode said first voltage provided from said offset compensating circuit, and provides said second voltage produced by shifting said first voltage by the threshold voltage of said first transistor of the second conductivity type to the gate electrode of said first transistor of the first conductivity type; and 
 said first transistor of the first conductivity type receives on its gate electrode said second voltage provided from said level shift circuit and provides an output voltage at the same potential as said input voltage to said output node. 
 
   
   
     6. The drive circuit according to  claim 5 , wherein
 said offset compensating circuit includes: 
 a third voltage holding circuit charged in a setting mode, and holding said voltage difference in an operation mode, and 
 a first switch circuit operating in said setting mode to connect a first node, to which one end of said third voltage holding circuit and the gate electrode of said first transistor of the second conductivity type are connected, to an input node, and to connect the other end of said third voltage holding circuit to said output node, and operating in said operation mode to isolate said first node and the other end of said third voltage holding circuit from said input node and said output node, respectively, and to connect said other end to said input node. 
 
   
   
     7. The drive circuit according to  claim 5 , wherein
 said first constant current circuit further includes: 
 a first current supply circuit supplying a current for setting said third voltage, and 
 a second switch circuit isolating said second transistor of the first conductivity type from said output node, and connecting said first voltage holding circuit and said second transistor of the first conductivity type to said first current supply circuit when said third voltage is set; 
 said first current supply circuit includes: 
 a first voltage generating portion generating a gate voltage determined depending on a threshold voltage of a transistor of the first conductivity type forming said first current supply circuit, and 
 a third transistor of the first conductivity type connected between a fifth power supply node and said second switch circuit, and receiving on its gate electrode said gate voltage generated by said first voltage generating portion; 
 said second constant current circuit further includes: 
 a second current supply circuit supplying a current for setting said fourth voltage, and 
 a third switch circuit isolating said second transistor of the second conductivity type from the gate electrode of said first transistor of the first conductivity type, and connecting said second voltage holding circuit and said second transistor of the second conductivity type to said second current supply circuit when said fourth voltage is set; and 
 said second current supply circuit includes: 
 a second voltage generating portion generating a gate voltage determined depending on a threshold voltage of a transistor of the second conductivity type forming said second current supply circuit, and 
 a third transistor of the second conductivity type connected between a sixth power supply node and said third switch circuit, and receiving on its gate electrode said gate voltage generated by said second voltage generating portion. 
 
   
   
     8. An image display device comprising:
 a plurality of image display elements arranged in rows and columns; 
 a plurality of scanning lines arranged corresponding to the rows of said plurality of image display elements, respectively, and selected successively with predetermined cycles; 
 a plurality of data lines arranged corresponding to the columns of said plurality of image display elements, respectively; 
 a voltage generating circuit generating at least one voltage corresponding to display brightness of each of said plurality of image display elements; 
 a decode circuit selecting, for each of the image display elements in the row to be scanned, a voltage designated by the pixel data corresponding to each of said image display elements in the row to be scanned from said at least one voltage; and 
 the drive circuit according to  claim 1  or  5 , receiving the voltage selected by said decode circuit from said decode circuit, and activating said plurality of data lines with the corresponding voltages. 
 
   
   
     9. The image display device according to  claim 8 , wherein each of said plurality of image display elements, said voltage generating circuit, said decode circuit and said drive circuit includes transistors, said transistors are thin film transistors. 
   
   
     10. The image display device according to  claim 8 , wherein said plurality of image display elements, said voltage generating circuit, said decode circuit and said drive circuit are integrally formed on either a glass substrate or a resin substrate.

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