US7282942B2ExpiredUtilityA1
Enhanced sampling methodology for semiconductor processing
Est. expirySep 1, 2024(expired)· nominal 20-yr term from priority
Inventors:Pushkar K. Merwah
Y02P90/02G05B 2219/45031G05B 19/41875G05B 2219/37224
63
PatentIndex Score
2
Cited by
9
References
13
Claims
Abstract
The present invention improves wafer sampling methods by partitioning a semiconductor wafer into a set of sampling regions and calculating yield of a sampling region(s) of the semiconductor wafer.
Claims
exact text as granted — not AI-modified1. A method for predicting semiconductor yield, comprising the steps of:
calculating yield for a first sampling region in a set of sampling regions on a semiconductor wafer;
calculating yield for a second sampling region in said set of sampling regions on said semiconductor wafer, said second sampling region neighboring said first sampling region; and,
predicting yield of a semiconductor wafer based upon at least said calculated yield of said first and said second sampling region.
2. A method as in claim 1 , further comprising, the step of:
partitioning a semiconductor wafer into a set of sampling regions, prior to said calculating yield for a first sampling region step, said set comprising at least two sampling regions.
3. A method as in claim 1 , wherein at least one sampling region comprises a shape of at least one of a quadrant, a slice, and a ring.
4. A method as in claim 1 , wherein said at least one sampling region on said semiconductor wafer comprises at least one die and said calculating yield for a first sampling region step further comprises:
testing said at least one die in said at least one sampling region; and,
determining said calculated yield of said at least one sampling region based upon results of said testing step.
5. A method as in claim 1 , further comprising, the steps of:
comparing said calculated yield of said first sampling region with said calculated yield of said second sampling region; and,
subsuming said second sampling region into said first sampling region whenever said calculated yield of said first sampling region is substantially similar to said calculated yield of said second sampling region.
6. A method as in claim 5 , wherein said predicting step further comprises, the step of:
predicting yield of said semiconductor wafer based upon said first sampling region with said subsumed second sampling region whenever said predicted yield of said first sampling region is substantially similar to said predicted yield of said second sampling region.
7. A method as in claim 1 , further comprising, the steps of:
comparing said calculated yield of said at least one sampling region with a target yield for said sampling region; and
discontinuing further testing of said at least one sampling region, whenever said calculated yield does not substantially equal said target yield.
8. A method as in claim 1 , further comprising, the step of:
repeating said calculating yield for a first sampling region, said calculating yield for a second sampling region, and said predicting steps for a predetermined number of semiconductor wafers.
9. A method as in claim 8 , further comprising, the step of:
predicting total yield for said predetermined number of semiconductor wafers.
10. A method as in claim 9 , further comprising, the step of:
comparing said predicted total yield for said predetermined number of semiconductor wafers with a target yield for said predetermined number of semiconductor wafers.
11. A method as in claim 10 , further comprising, the step of:
initiating a semiconductor wafer fabrication run whenever said predicted total yield does not satisfy said target yield for said predetermined number of semiconductor wafers.
12. A method as in claim 10 , further comprising, the step of:
altering at least one semiconductor fabrication process condition whenever said predicted total yield for said predetermined number of semiconductor wafers does not satisfy said target yield for said predetermined number of semiconductor wafers.
13. A computer software program adapted to execute a method comprising the steps of:
calculating yield for a first sampling region in a set of sampling regions on a semiconductor wafer;
calculating yield for a second sampling region in said set of sampling regions on said semiconductor wafer, said second sampling region neighboring said first sampling region; and,
predicting yield of a semiconductor wafer based upon at least said calculated yield of said first and said second sampling region.Join the waitlist — get patent alerts
Track US7282942B2 — get alerts on status changes and closely related new filings.
We store only your email — no account needed. See our privacy policy.